ODROID 485 Board test jig firmware

This commit is contained in:
2025-04-15 14:29:43 +09:00
commit 6d04dec21b
5 changed files with 2448 additions and 0 deletions

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main/CMakeLists.txt Normal file
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idf_component_register(SRCS "test-485.c"
INCLUDE_DIRS ".")

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main/test-485.c Normal file
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#include <esp_log.h>
#include <freertos/FreeRTOS.h>
#include <freertos/task.h>
#include <stdio.h>
#include <string.h>
#include <driver/gpio.h>
#include <driver/uart.h>
#include <esp_random.h>
const static char *TAG = "MAIN";
#define GPIO_LED_PASS 12
#define GPIO_LED_FAIL 13
#define GPIO_BTN_TEST 14
static void init_gpio()
{
gpio_config_t io_conf = {};
io_conf.intr_type = GPIO_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
io_conf.pin_bit_mask = ((1ULL<<GPIO_LED_PASS) | (1ULL<<GPIO_LED_FAIL));
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
io_conf.intr_type = GPIO_INTR_DISABLE;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pin_bit_mask = (1ULL<<GPIO_BTN_TEST);
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
}
static void blink()
{
gpio_set_level(GPIO_LED_PASS, 1);
gpio_set_level(GPIO_LED_FAIL, 0);
vTaskDelay(100 / portTICK_PERIOD_MS);
gpio_set_level(GPIO_LED_PASS, 0);
gpio_set_level(GPIO_LED_FAIL, 1);
vTaskDelay(100 / portTICK_PERIOD_MS);
}
static void led_pass()
{
gpio_set_level(GPIO_LED_PASS, 1);
gpio_set_level(GPIO_LED_FAIL, 0);
}
static void led_fail()
{
gpio_set_level(GPIO_LED_PASS, 0);
gpio_set_level(GPIO_LED_FAIL, 1);
}
#define BAUDRATE 115200
#define UART_485_A_TX 17
#define UART_485_A_RX 18
#define UART_485_B_TX 15
#define UART_485_B_RX 16
#define UART_BUFFER_SIZE 100
#define UART_A UART_NUM_2
#define UART_B UART_NUM_1
static void init_uart()
{
int intr_alloc_flags = 0;
uart_config_t uart_a_config = {
.baud_rate = BAUDRATE,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
.source_clk = UART_SCLK_DEFAULT,
};
ESP_ERROR_CHECK(uart_driver_install(UART_A, UART_BUFFER_SIZE * 2, 0, 0, NULL, intr_alloc_flags));
ESP_ERROR_CHECK(uart_param_config(UART_A, &uart_a_config));
ESP_ERROR_CHECK(uart_set_pin(UART_A, UART_485_A_TX, UART_485_A_RX, -1, -1));
vTaskDelay(100 / portTICK_PERIOD_MS);
uart_config_t uart_b_config = {
.baud_rate = BAUDRATE,
.data_bits = UART_DATA_8_BITS,
.parity = UART_PARITY_DISABLE,
.stop_bits = UART_STOP_BITS_1,
.flow_ctrl = UART_HW_FLOWCTRL_DISABLE,
.source_clk = UART_SCLK_DEFAULT,
};
ESP_ERROR_CHECK(uart_driver_install(UART_B, UART_BUFFER_SIZE * 2, 0, 0, NULL, intr_alloc_flags));
ESP_ERROR_CHECK(uart_param_config(UART_B, &uart_b_config));
ESP_ERROR_CHECK(uart_set_pin(UART_B, UART_485_B_TX, UART_485_B_RX, -1, -1));
vTaskDelay(100 / portTICK_PERIOD_MS);
}
static void gen_rand_str(char* msg)
{
uint32_t r = esp_random();
sprintf(msg, "%08" PRIx32, r);
}
static void test_485()
{
char msg_a[UART_BUFFER_SIZE];
char msg_b[UART_BUFFER_SIZE];
// A -> B
gen_rand_str(msg_a);
uart_write_bytes(UART_A, msg_a, strlen(msg_a));
int len = uart_read_bytes(UART_B, msg_b, UART_BUFFER_SIZE, 10 / portTICK_PERIOD_MS);
if (len <= 0)
{
led_fail();
ESP_LOGW(TAG, "A -> B: read fail");
return;
}
msg_b[len] = '\0';
if (strcmp(msg_a, msg_b) != 0)
{
led_fail();
ESP_LOGW(TAG, "A -> B: mismatch: %s, %s", msg_a, msg_b);
return;
}
vTaskDelay(10 / portTICK_PERIOD_MS);
// B -> A
gen_rand_str(msg_a);
uart_write_bytes(UART_B, msg_a, strlen(msg_a));
len = uart_read_bytes(UART_A, msg_b, UART_BUFFER_SIZE, 10 / portTICK_PERIOD_MS);
if (len <= 0)
{
led_fail();
ESP_LOGW(TAG, "A -> B: read fail");
return;
}
msg_b[len] = '\0';
if (strcmp(msg_a, msg_b) != 0)
{
led_fail();
ESP_LOGW(TAG, "A -> B: mismatch: %s, %s", msg_a, msg_b);
return;
}
led_pass();
}
void app_main(void)
{
init_gpio();
init_uart();
blink();
while (1)
{
while (1)
{
vTaskDelay(10 / portTICK_PERIOD_MS);
if (!gpio_get_level(GPIO_BTN_TEST))
{
break;
}
}
blink();
test_485();
}
}