/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
/*
 * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
 */

#ifndef __ADDR_DTMB_FRONT_H__
#define __ADDR_DTMB_FRONT_H__

#define  DTMB_FRONT_19_CONFIG		(0x19)
#define  DTMB_FRONT_AFIFO_ADC		(0x20)
#define  DTMB_FRONT_AGC_CONFIG1		(0x21)
#define  DTMB_FRONT_AGC_CONFIG2		(0x22)
#define  DTMB_FRONT_AGC_CONFIG3		(0x23)
#define  DTMB_FRONT_AGC_CONFIG4		(0x24)
#define  DTMB_FRONT_DDC_BYPASS		(0x25)
#define  DTMB_FRONT_DC_HOLD		(0x28)
#define  DTMB_FRONT_DAGC_TARGET_POWER	(0x29)
#define  DTMB_FRONT_ACF_BYPASS		(0x2a)
#define  DTMB_FRONT_COEF_SET1		(0x2b)
#define  DTMB_FRONT_COEF_SET2		(0x2c)
#define  DTMB_FRONT_COEF_SET3		(0x2d)
#define  DTMB_FRONT_COEF_SET4		(0x2e)
#define  DTMB_FRONT_COEF_SET5		(0x2f)
#define  DTMB_FRONT_COEF_SET6		(0x30)
#define  DTMB_FRONT_COEF_SET7		(0x31)
#define  DTMB_FRONT_COEF_SET8		(0x32)
#define  DTMB_FRONT_COEF_SET9		(0x33)
#define  DTMB_FRONT_COEF_SET10		(0x34)
#define  DTMB_FRONT_COEF_SET11		(0x35)
#define  DTMB_FRONT_COEF_SET12		(0x36)
#define  DTMB_FRONT_COEF_SET13		(0x37)
#define  DTMB_FRONT_COEF_SET14		(0x38)
#define  DTMB_FRONT_COEF_SET15		(0x39)
#define  DTMB_FRONT_COEF_SET16		(0x3a)
#define  DTMB_FRONT_COEF_SET17		(0x3b)
#define  DTMB_FRONT_COEF_SET18		(0x3c)
#define  DTMB_FRONT_COEF_SET19		(0x3d)
#define  DTMB_FRONT_SRC_CONFIG1		(0x3e)
#define  DTMB_FRONT_SRC_CONFIG2		(0x3f)
#define  DTMB_FRONT_SFIFO_OUT_LEN	(0x40)
#define  DTMB_FRONT_DAGC_GAIN		(0x41)
#define  DTMB_FRONT_IQIB_STEP		(0x42)
#define  DTMB_FRONT_IQIB_CONFIG		(0x43)
#define  DTMB_FRONT_ST_CONFIG		(0x44)
#define  DTMB_FRONT_ST_FREQ		(0x45)
#define  DTMB_FRONT_46_CONFIG		(0x46)
#define  DTMB_FRONT_47_CONFIG		(0x47)
#define  DTMB_FRONT_DEBUG_CFG		(0x48)
#define  DTMB_FRONT_MEM_ADDR		(0x49)
#define  DTMB_FRONT_4d_CONFIG		(0x4d)
#define  DTMB_FRONT_4e_CONFIG		(0x4e)

#endif
