diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.c b/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.c
index 87ce7f50b..58b6ee976 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.c
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.c
@@ -206,7 +206,7 @@ int disable_hdr;
 int vrr_range_dynamic_update_en;
 int allm_update_en;
 int rx_phy_level = 1;
-
+int def_trim_value;
 static struct notifier_block aml_hdcp22_pm_notifier = {
 	.notifier_call = aml_hdcp22_pm_notify,
 };
@@ -3925,6 +3925,7 @@ static int hdmirx_probe(struct platform_device *pdev)
 	if (rx_info.chip_id >= CHIP_ID_T3X)
 		rx_emp1_resource_allocate(&pdev->dev);
 	//rx[rx_info.main_port].port = rx[rx_info.main_port].arc_port;
+	def_trim_value = aml_phy_get_def_trim_value();
 	aml_phy_get_trim_val();
 	edid_auto_mode_init();
 	hdmirx_hw_probe();
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.h b/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.h
index 8ade17684..8379350e6 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.h
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_drv.h
@@ -145,7 +145,8 @@
 /* 2023 09 27 reduce phy power */
 /* optimize afifo configuration */
 /* 2023.11.03 disable DDR access when suspend */
-#define RX_VER2 "ver.2023/11/03"
+/* 2023.12.1 fix trim value err when resume */
+#define RX_VER2 "ver.2023/12/01"
 
 #define PFIFO_SIZE 160
 #define HDCP14_KEY_SIZE 368
@@ -1033,6 +1034,7 @@ extern char edid_cur[EDID_SIZE];
 extern int vpp_mute_cnt;
 extern int gcp_mute_cnt;
 extern int gcp_mute_flag[4];
+extern int def_trim_value;
 #ifdef CONFIG_AMLOGIC_MEDIA_VRR
 extern struct notifier_block vrr_notify;
 #endif
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.c b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.c
index d1eee293a..709c543d6 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.c
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.c
@@ -6147,7 +6147,7 @@ bool is_ft_trim_done(void)
 /*T5 todo:*/
 void aml_phy_get_trim_val_tl1_tm2(void)
 {
-	phy_trim_val = rd_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1);
+	phy_trim_val = def_trim_value;
 	dts_debug_flag = (phy_term_lel >> 4) & 0x1;
 	rlevel = phy_term_lel & 0xf;
 	if (rlevel > 11)
@@ -7338,3 +7338,23 @@ void reset_pcs(u8 port)
 	hdmirx_wr_top(TOP_SW_RESET, 0, port);
 }
 
+int aml_phy_get_def_trim_value(void)
+{
+	// t3x to do
+	if (rx_info.chip_id >= CHIP_ID_TL1 &&
+		rx_info.chip_id <= CHIP_ID_TM2)
+		return rd_reg_hhi(HHI_HDMIRX_PHY_MISC_CNTL1);
+	else if (rx_info.chip_id >= CHIP_ID_T5 &&
+		rx_info.chip_id <= CHIP_ID_T5D)
+		return hdmirx_rd_amlphy(T5_HHI_RX_PHY_MISC_CNTL1);
+	else if (rx_info.chip_id >= CHIP_ID_T7 &&
+		rx_info.chip_id <= CHIP_ID_T5W)
+		return hdmirx_rd_amlphy(T7_HHI_RX_PHY_MISC_CNTL1);
+	else if (rx_info.chip_id == CHIP_ID_T5M)
+		return hdmirx_rd_amlphy(T5M_HDMIRX20PHY_DCHA_MISC1);
+	else if (rx_info.chip_id == CHIP_ID_TXHD2)
+		return hdmirx_rd_amlphy(TXHD2_HDMIRX20PHY_DCHA_MISC1);
+	else
+		return 0;
+}
+
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.h b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.h
index 3cee12938..000888d1b 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.h
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw.h
@@ -3474,6 +3474,7 @@ void rx_set_color_bar(bool en, unsigned int lvl, u8 port);
 void reset_pcs(u8 port);
 bool is_earc_hpd_low(void);
 void rx_mute_vpp(u8 port);
+int aml_phy_get_def_trim_value(void);
 
 /* t3x  */
 void hdmi_tx_rx_frl_training_main(u8 port);
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5.c b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5.c
index 2f2d4329b..8e57f35d2 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5.c
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5.c
@@ -869,7 +869,7 @@ void aml_phy_get_trim_val_t5(void)
 
 	dts_debug_flag = (phy_term_lel >> 4) & 0x1;
 	if (dts_debug_flag == 0) {
-		data32 = hdmirx_rd_amlphy(T5_HHI_RX_PHY_MISC_CNTL1);
+		data32 = def_trim_value;
 		rterm_trim_val_t5 = (data32 >> 12) & 0xf;
 		rterm_trim_flag_t5 = data32 & 0x1;
 	} else {
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5m.c b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5m.c
index 09b62e4a6..7eca57f9f 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5m.c
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t5m.c
@@ -645,7 +645,7 @@ void aml_phy_offset_cal_t5m(void)
 	data32 = 0xffe00100;
 	if (rterm_trim_flag_t5m) {
 		data32 = ((data32 & (~((0xf << 12) | 0x1))) |
-			(rterm_trim_val_t5m << 12) | rterm_trim_flag_t5m);
+			(rterm_trim_val_t5m << 12) | rterm_trim_flag_t5m << 4);
 	}
 	hdmirx_wr_amlphy(T5M_HDMIRX20PHY_DCHA_MISC1, data32);
 	usleep_range(10, 20);
@@ -1285,7 +1285,7 @@ void aml_phy_get_trim_val_t5m(void)
 
 	dts_debug_flag = (phy_term_lel >> 4) & 0x1;
 	if (dts_debug_flag == 0) {
-		data32 = hdmirx_rd_amlphy(T5M_HDMIRX20PHY_DCHA_MISC1);
+		data32 = def_trim_value;
 		rterm_trim_val_t5m = (data32 >> 12) & 0xf;
 		rterm_trim_flag_t5m = data32 & 0x1;
 	} else {
@@ -1349,7 +1349,7 @@ void aml_phy_cfg_t5m(void)
 			if (dts_debug_flag)
 				rterm_trim_val_t5m = t5m_rlevel[rlevel];
 			data32 = ((data32 & (~((0xf << 12) | 0x1))) |
-				(rterm_trim_val_t5m << 12) | rterm_trim_flag_t5m);
+				(rterm_trim_val_t5m << 12) | rterm_trim_flag_t5m << 4);
 		}
 		hdmirx_wr_amlphy(T5M_HDMIRX20PHY_DCHA_MISC1, data32);
 		usleep_range(5, 10);
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t7.c b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t7.c
index 8e74539fc..333717a19 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t7.c
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_t7.c
@@ -913,7 +913,7 @@ void aml_phy_get_trim_val_t7(void)
 
 	dts_debug_flag = (phy_term_lel >> 4) & 0x1;
 	if (dts_debug_flag == 0) {
-		data32 = hdmirx_rd_amlphy(T7_HHI_RX_PHY_MISC_CNTL1);
+		data32 = def_trim_value;
 		rterm_trim_val_t7 = (data32 >> 12) & 0xf;
 		rterm_trim_flag_t7 = data32 & 0x1;
 	} else {
diff --git a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_txhd2.c b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_txhd2.c
index 33795284d..e91c92b49 100644
--- a/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_txhd2.c
+++ b/drivers/media/vin/tvin/hdmirx/hdmi_rx_hw_txhd2.c
@@ -646,7 +646,7 @@ void aml_phy_offset_cal_txhd2(void)
 	data32 = 0xffe00100;
 	if (rterm_trim_flag_txhd2) {
 		data32 = ((data32 & (~((0xf << 12) | 0x1))) |
-			(rterm_trim_val_txhd2 << 12) | rterm_trim_flag_txhd2);
+			(rterm_trim_val_txhd2 << 12) | rterm_trim_flag_txhd2 << 4);
 	}
 	hdmirx_wr_amlphy(TXHD2_HDMIRX20PHY_DCHA_MISC1, data32);
 	usleep_range(10, 20);
@@ -1337,7 +1337,7 @@ void aml_phy_get_trim_val_txhd2(void)
 
 	dts_debug_flag = (phy_term_lel >> 4) & 0x1;
 	if (dts_debug_flag == 0) {
-		data32 = hdmirx_rd_amlphy(TXHD2_HDMIRX20PHY_DCHA_MISC1);
+		data32 = def_trim_value;
 		rterm_trim_val_txhd2 = (data32 >> 12) & 0xf;
 		rterm_trim_flag_txhd2 = data32 & 0x1;
 	} else {
@@ -1401,7 +1401,7 @@ void aml_phy_cfg_txhd2(void)
 			if (dts_debug_flag)
 				rterm_trim_val_txhd2 = txhd2_rlevel[rlevel];
 			data32 = ((data32 & (~((0xf << 12) | 0x1))) |
-				(rterm_trim_val_txhd2 << 12) | rterm_trim_flag_txhd2);
+				(rterm_trim_val_txhd2 << 12) | rterm_trim_flag_txhd2 << 4);
 		}
 		hdmirx_wr_amlphy(TXHD2_HDMIRX20PHY_DCHA_MISC1, data32);
 		usleep_range(5, 10);