From 0df05afc0c6439e4d44548d4e610751da8a40735 Mon Sep 17 00:00:00 2001 From: Huqiang Qin Date: Mon, 15 May 2023 20:06:56 +0800 Subject: [PATCH] saradc: c1: support saradc [1/1] PD#SWPL-121166 Problem: C1 Bringup Solution: c1 Bringup Verify: C1/AE400 Change-Id: I3c7ade4c25ca1a13a6a49a45797b75741a6f08bb Signed-off-by: Huqiang Qin --- arch/arm64/boot/dts/amlogic/meson-c1.dtsi | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-c1.dtsi b/arch/arm64/boot/dts/amlogic/meson-c1.dtsi index 0700c45a7..1782b692e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-c1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-c1.dtsi @@ -550,17 +550,16 @@ saradc: adc@2c00 { compatible = "amlogic,meson-g12a-saradc", - "amlogic,meson-saradc"; - //reg = <0x0 0x2c00 0x0 0x48>; + "amlogic,meson-saradc"; + reg = <0x0 0x2c00 0x0 0x48>; #io-channel-cells = <1>; - //power-domains = <&pwrdm PDID_I2C>; - //interrupts = ; - //clocks = <&xtal>, - // <&clkc CLKID_SARADC>, - // <&clkc CLKID_SARADC_GATE>, - // <&clkc CLKID_SARADC_SEL>; - //clock-names = "clkin", "core", - // "adc_clk", "adc_sel"; + power-domains = <&pwrdm PDID_CX_I2C>; + interrupts = ; + clocks = <&xtal>, + <&clkc CLKID_SARADC>, + <&clkc CLKID_SARADC_DIV>, + <&clkc CLKID_SARADC_MUX>; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; status = "disabled"; };