diff --git a/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c b/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c
index af6ddae67..4909ca59e 100644
--- a/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c
+++ b/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c
@@ -2045,7 +2045,11 @@ static void hdmitx_set_phy(struct hdmitx_dev *hdev)
 		phy_addr = P_TM2_HHI_HDMI_PHY_CNTL0;
 	else
 		phy_addr = P_HHI_HDMI_PHY_CNTL0;
-	hd_write_reg(phy_addr, 0x0);
+
+	if (earc_hdmitx_hpdst && chip_id == MESON_CPU_ID_SC2)
+		hd_write_reg(phy_addr, 0x0b4242);
+	else
+		hd_write_reg(phy_addr, 0x0);
 
 	if (chip_id == MESON_CPU_ID_TM2 || chip_id == MESON_CPU_ID_TM2B)
 		phy_addr = P_TM2_HHI_HDMI_PHY_CNTL1;
@@ -6024,7 +6028,11 @@ static void hdmi_phy_suspend(void)
 		phy_cntl5 = P_HHI_HDMI_PHY_CNTL5;
 		break;
 	}
-	hd_write_reg(phy_cntl0, 0x0);
+
+	if (earc_hdmitx_hpdst && hdev->tx_hw.chip_data->chip_type == MESON_CPU_ID_SC2)
+		hd_write_reg(phy_cntl0, 0x0b4242);
+	else
+		hd_write_reg(phy_cntl0, 0x0);
 	/* keep PHY_CNTL3 bit[1:0] as 0b11,
 	 * otherwise may cause HDCP22 boot failed
 	 */