From 1cbf38bb02e0093a6b5fab440e231ec7d3cdeb2c Mon Sep 17 00:00:00 2001
From: "dongfei.li" <dongfei.li@amlogic.com>
Date: Thu, 21 Dec 2023 07:57:56 +0000
Subject: [PATCH] frc: frc chg new latency  [1/1]

PD#SWPL-155997

Problem:
sync customer changed

Solution:
sync customer changed

Verify:
T5M

Change-Id: I39e2f4ff3619dd8d67921e432cbe9082226e197a
Signed-off-by: dongfei.li <dongfei.li@amlogic.com>
---
 drivers/media/frc/frc_interface.c | 81 +++++++++++++++++++++++++++++++
 drivers/media/frc/frc_interface.h |  4 ++
 2 files changed, 85 insertions(+)

diff --git a/drivers/media/frc/frc_interface.c b/drivers/media/frc/frc_interface.c
index b5af574f8..fb5d35a80 100644
--- a/drivers/media/frc/frc_interface.c
+++ b/drivers/media/frc/frc_interface.c
@@ -112,6 +112,87 @@ int frc_set_mode(enum frc_state_e state)
  * get current frc video latency
  * return: ms
  */
+int frc_get_video_latency_for_gd(void)
+{
+	struct frc_dev_s *devp = get_frc_devp();
+	struct frc_fw_data_s *fw_data;
+	struct frc_top_type_s *frc_top;
+
+	// u32 out_frm_dly_num;
+	struct vinfo_s *vinfo = get_current_vinfo();
+	u32 vout_hz = 0;
+	int delay_time = -1;   /*ms*/
+
+	fw_data = (struct frc_fw_data_s *)devp->fw_data;
+	frc_top = &fw_data->frc_top_type;
+
+	if (vinfo && vinfo->sync_duration_den != 0)
+		vout_hz = vinfo->sync_duration_num / vinfo->sync_duration_den;
+	// delay_time = out_frm_dly_num;
+	if (!devp || !vinfo)
+		return -1;
+
+	if (devp->frc_sts.auto_ctrl == 1) {
+		if (devp->in_sts.frc_vf_rate == 0)
+			return -1;
+		else if (frc_top->film_mode == 0)
+			delay_time =  35 * 100 / devp->in_sts.frc_vf_rate;
+		else if (frc_top->film_mode != 0) // 30hz or 25hz
+			delay_time =  35 * 100 / devp->in_sts.frc_vf_rate;
+		else
+			delay_time = -2;
+	} else {
+		delay_time = -1;
+	}
+	return delay_time;
+}
+EXPORT_SYMBOL(frc_get_video_latency_for_gd);
+
+/*
+ * get current frc video latency 1
+ * return: out vsync num
+ */
+int frc_get_video_latency_for_gd1(void)
+{
+	struct frc_dev_s *devp = get_frc_devp();
+	struct frc_fw_data_s *fw_data;
+	struct frc_top_type_s *frc_top;
+	// u32 out_frm_dly_num;
+	struct vinfo_s *vinfo = get_current_vinfo();
+	u32 vout_hz = 0;
+
+	int delay_time = -1;   /*ms*/
+	int delay_vsync_num = 0;
+
+	fw_data = (struct frc_fw_data_s *)devp->fw_data;
+	frc_top = &fw_data->frc_top_type;
+
+	if (!devp || !vinfo)
+		return -1;
+	if (vinfo && vinfo->sync_duration_den != 0)
+		vout_hz = vinfo->sync_duration_num / vinfo->sync_duration_den;
+
+	if (devp->frc_sts.auto_ctrl == 1) {
+		if (devp->in_sts.frc_vf_rate == 0)
+			return -1;
+		else if (frc_top->film_mode == 0)
+			delay_time =  35 * 100 / devp->in_sts.frc_vf_rate;
+		else if (frc_top->film_mode != 0) // 30hz or 25hz
+			delay_time =  35 * 100 / devp->in_sts.frc_vf_rate;
+		else
+			delay_time = -2;
+	} else {
+		return -1;
+	}
+
+	if (delay_time > 0)
+		delay_vsync_num = delay_time * vout_hz / 1000;
+	else
+		delay_vsync_num = -2;
+	return delay_vsync_num;
+}
+EXPORT_SYMBOL(frc_get_video_latency_for_gd1);
+
 int frc_get_video_latency(void)
 {
 	struct frc_dev_s *devp = get_frc_devp();
diff --git a/drivers/media/frc/frc_interface.h b/drivers/media/frc/frc_interface.h
index 9437dc3a0..8f9d920ab 100644
--- a/drivers/media/frc/frc_interface.h
+++ b/drivers/media/frc/frc_interface.h
@@ -23,6 +23,10 @@ enum frc_state_e {
 int frc_input_handle(struct vframe_s *vf, struct vpp_frame_par_s *cur_video_sts);
 int frc_set_mode(enum frc_state_e state);
 int frc_get_video_latency(void);
+int frc_get_video_latency_for_gd(void);
+int frc_get_video_latency_for_gd1(void);
+
+int frc_is_on(void);
 int frc_is_supported(void);
 int frc_memc_set_level(u8 level);
 int frc_fpp_memc_set_level(u8 level, u8 num);