diff --git a/drivers/media/di_multi/deinterlace.c b/drivers/media/di_multi/deinterlace.c
index 882844367..cebfc3036 100644
--- a/drivers/media/di_multi/deinterlace.c
+++ b/drivers/media/di_multi/deinterlace.c
@@ -10730,7 +10730,8 @@ void di_unreg_setting(bool plink)
 	    DIM_IS_IC(T5DB)	||
 	    DIM_IS_IC(T5D)	||
 	    DIM_IS_IC(T3)	||
-	    DIM_IS_IC(T3X)) {
+	    DIM_IS_IC(T3X)	||
+	    DIM_IS_IC(S7D)) {
 		#ifdef CLK_TREE_SUPPORT
 		if (dimp_get(edi_mp_clock_low_ratio))
 			clk_set_rate(de_devp->vpu_clkb,
diff --git a/drivers/media/di_multi/di_plink_api.c b/drivers/media/di_multi/di_plink_api.c
index 3604a6449..ca7f0d04d 100644
--- a/drivers/media/di_multi/di_plink_api.c
+++ b/drivers/media/di_multi/di_plink_api.c
@@ -6257,7 +6257,8 @@ void dpvpph_unreg_setting(void)
 	    DIM_IS_IC(T5DB)	||
 	    DIM_IS_IC(T5D)	||
 	    DIM_IS_IC(T3)	||
-	    DIM_IS_IC(T3X)) {
+	    DIM_IS_IC(T3X)	||
+	    DIM_IS_IC(S7D)) {
 		#ifdef CLK_TREE_SUPPORT
 		if (dimp_get(edi_mp_clock_low_ratio))
 			clk_set_rate(de_devp->vpu_clkb,
diff --git a/drivers/media/di_multi/di_sys.c b/drivers/media/di_multi/di_sys.c
index 9615a2dde..5052b4ca9 100644
--- a/drivers/media/di_multi/di_sys.c
+++ b/drivers/media/di_multi/di_sys.c
@@ -4001,10 +4001,19 @@ static int dim_probe(struct platform_device *pdev)
 
 	//di_pr_info("%s allocate rdma channel %d.\n", __func__,
 	//	   di_devp->rdma_handle);
+	if (DIM_IS_IC(S7D))
+		dimp_set(edi_mp_clock_low_ratio, 18000000);
+
 	if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) {
 		dim_get_vpu_clkb(&pdev->dev, di_devp);
 		#ifdef CLK_TREE_SUPPORT
 		clk_prepare_enable(di_devp->vpu_clkb);
+		if (DIM_IS_IC(S7D)) {
+			if (dimp_get(edi_mp_clock_low_ratio)) {
+				clk_set_rate(di_devp->vpu_clkb,
+					dimp_get(edi_mp_clock_low_ratio));
+			}
+		}
 		dbg_mem("vpu clkb =%ld.\n", clk_get_rate(di_devp->vpu_clkb));
 		#else
 		aml_write_hiubus(HHI_VPU_CLKB_CNTL, 0x1000100);
@@ -4286,7 +4295,8 @@ static int di_suspend(struct device *dev)
 		   DIM_IS_IC(T5DB)	||
 		   DIM_IS_IC(T5D)	||
 		   DIM_IS_IC(T3)	||
-		   DIM_IS_IC(T3X)) {
+		   DIM_IS_IC(T3X)	||
+		   DIM_IS_IC(S7D)) {
 	#ifdef CLK_TREE_SUPPORT
 			if (dimp_get(edi_mp_clock_low_ratio)) {
 				clk_set_rate(di_devp->vpu_clkb,