From 45a4bf19951f8bdbad553cce91cdfe7eee48125f Mon Sep 17 00:00:00 2001
From: Yongjie Zhu <yongjie.zhu@amlogic.com>
Date: Sat, 15 Jun 2024 09:51:13 +0000
Subject: [PATCH] gpu: s6 use devfreq policy [1/1]

PD#SWPL-173296

Problem:
enable s6 gpu dfs function

Solution:
s6 use devfreq policy

Verify:
s6

Change-Id: I7f041eb2f4bd1acc5971f17887cc8199bf7d33d7
Signed-off-by: Yongjie Zhu <yongjie.zhu@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-s6.dtsi     | 29 +++++++++++++++++--
 .../arm64/boot/dts/amlogic/meson-valhall.dtsi | 10 +++++++
 2 files changed, 36 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/amlogic/meson-s6.dtsi b/arch/arm64/boot/dts/amlogic/meson-s6.dtsi
index 298ff0a8d..6d977eb8e 100644
--- a/arch/arm64/boot/dts/amlogic/meson-s6.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-s6.dtsi
@@ -2340,10 +2340,30 @@
 
 	gpu_opp_table: gpu_opp_table {
 		compatible = "operating-points-v2";
+		opp-285 {
+			opp-hz = /bits/ 64 <285714281>;
+			opp-microvolt = <1150>;
+		};
 		opp-400 {
 			opp-hz = /bits/ 64 <400000000>;
 			opp-microvolt = <1150>;
 		};
+		opp-500 {
+			opp-hz = /bits/ 64 <500000000>;
+			opp-microvolt = <1150>;
+		};
+		opp-666 {
+			opp-hz = /bits/ 64 <666666666>;
+			opp-microvolt = <1150>;
+		};
+		opp-800 {
+			opp-hz = /bits/ 64 <800000000>;
+			opp-microvolt = <1150>;
+		};
+		opp-996 {
+			opp-hz = /bits/ 64 <996000000>;
+			opp-microvolt = <1150>;
+		};
 	};
 };
 
@@ -3329,19 +3349,22 @@
 			  <&clkc CLKID_MALI>,
 			  <&clkc CLKID_MALI_STACK_0_MUX>,
 			  <&clkc CLKID_MALI_STACK_0>,
-			  <&clkc CLKID_MALI_STACK>; /* Glitch free mux */
+			  <&clkc CLKID_MALI_STACK>, /* Glitch free mux */
+			  <&scmi_clk CLKID_GP1_PLL>;
 	assigned-clock-parents = <&clkc CLKID_FCLK_DIV5>,
 				 <0>, /* Do Nothing */
 				 <&clkc CLKID_MALI_0>,
 				 <&clkc CLKID_FCLK_DIV5>,
 				 <0>,
-				 <&clkc CLKID_MALI_STACK_0>;
+				 <&clkc CLKID_MALI_STACK_0>,
+				 <0>;
 	assigned-clock-rates = <0>, /* Do Nothing */
 			       <400000000>,
 			       <0>,
 			       <0>,
 			       <400000000>,
-			       <0>; /* Do Nothing */
+			       <0>, /* Do Nothing */
+			       <996000000>;
 
 	tbl = <&dvfs400_cfg>;//bringup s6 use fix clock 400M
 
diff --git a/arch/arm64/boot/dts/amlogic/meson-valhall.dtsi b/arch/arm64/boot/dts/amlogic/meson-valhall.dtsi
index 574884b5d..e38e19596 100644
--- a/arch/arm64/boot/dts/amlogic/meson-valhall.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-valhall.dtsi
@@ -118,6 +118,16 @@
 			keep_count = <5>;
 			threshold = <80 255>;
 		};
+
+		dvfs996_cfg:dvfs996_cfg {
+			clk_freq = <996000000>;
+			clk_parent = "gp1_pll";
+			clkp_freq = <996000000>;
+			clk_reg = <0x200>;
+			voltage = <1150>;
+			keep_count = <5>;
+			threshold = <80 255>;
+		};
 	};
 
 };/* end of / */