From 46b3b6fa76be6292b02859593dffccfbbd49244e Mon Sep 17 00:00:00 2001 From: jinbiao Date: Mon, 1 Apr 2024 12:20:57 +0000 Subject: [PATCH] SM1: Support HS400 for eMMC. [1/1] PD#SWPL-163871 Problem: Bring up. Solution: Support HS400 for eMMC. Verify: SM1_AC200 Change-Id: I8b4f8ffd6acc01e51eaa8c543c51a7cc379b926c Signed-off-by: jinbiao --- .../boot/dts/amlogic/sm1_s905d3_ac200.dts | 70 +- .../dts/amlogic/sm1_s905d3_ac200_debian.dts | 2084 +++++++++++++++++ .../dts/amlogic/sm1_s905d3_ac200_linux.dts | 70 +- drivers/mmc/host/meson-gx-mmc.c | 38 - 4 files changed, 2154 insertions(+), 108 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_debian.dts diff --git a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts index 7782fb433..b760c4a67 100644 --- a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts +++ b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts @@ -1910,9 +1910,9 @@ max-frequency = <200000000>; non-removable; disable-wp; - //mmc-ddr-1_8v; - //mmc-hs200-1_8v; - //mmc-hs400-1_8v; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; //mmc-pwrseq = <&emmc_pwrseq>; //vmmc-supply = <&vcc_3v3>; //vqmmc-supply = <&vddio_boot>; @@ -1937,41 +1937,41 @@ // &ao_to_sd_uart_pins>; pinctrl-names = "sd_default", - "clk-gate", - "sd_1bit_pins"; - // "sd_clk_cmd_uart_pins", - // "sd_1bit_uart_pins", - // "sd_to_ao_uart_pins", - // "ao_to_sd_uart_pins", - // "sd_to_ao_jtag_pins", - // "ao_to_sd_jtag_pins"; - bus-width = <4>; - cap-sd-highspeed; -// sd-uhs-sdr12; -// sd-uhs-sdr25; -// sd-uhs-sdr50; -// sd-uhs-sdr104; - max-frequency = <200000000>; - disable-wp; - dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; - cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; - //vmmc-supply = <&vddao_3v3>; - //vqmmc-supply = <&emmc_1v8>; + "clk-gate", + "sd_1bit_pins"; + // "sd_clk_cmd_uart_pins", + // "sd_1bit_uart_pins", + // "sd_to_ao_uart_pins", + // "ao_to_sd_uart_pins", + // "sd_to_ao_jtag_pins", + // "ao_to_sd_jtag_pins"; + bus-width = <4>; + cap-sd-highspeed; + //sd-uhs-sdr12; + //sd-uhs-sdr25; + //sd-uhs-sdr50; + //sd-uhs-sdr104; + max-frequency = <200000000>; + disable-wp; + dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; + //vmmc-supply = <&vddao_3v3>; + //vqmmc-supply = <&emmc_1v8>; }; &sd_emmc_a { - status = "okay"; - pinctrl-0 = <&sdio_m_pins>; - pinctrl-1 = <&sdio_m_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr104; - non-removable; - max-frequency = <200000000>; - disable-wp; - cap-sdio-irq; - keep-power-in-suspend; + status = "okay"; + pinctrl-0 = <&sdio_m_pins>; + pinctrl-1 = <&sdio_m_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr104; + non-removable; + max-frequency = <200000000>; + disable-wp; + cap-sdio-irq; + keep-power-in-suspend; //broken-cd; }; diff --git a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_debian.dts b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_debian.dts new file mode 100644 index 000000000..cc508acc5 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_debian.dts @@ -0,0 +1,2084 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "mesonsm1.dtsi" +#include "mesonsm1_ac200-panel.dtsi" +#include "mesonsm1_drm_dual_disp.dtsi" +#include "partition_debian_linux.dtsi" + +/ { + amlogic-dt-id = "sm1_ac200_2g"; + compatible = "sm1_ac200_2g"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_AO; + serial1 = &uart_A; + serial2 = &uart_B; + serial3 = &uart_C; + serial4 = &uart_AO_B; + tsensor0 = &p_tsensor; + tsensor1 = &d_tsensor; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c_AO; + spi1 = &spicc0; + spi2 = &spicc1; + }; + + memory@0 { + device_type = "memory"; + linux,usable-memory = <0x0 0x000000 0x0 0x80000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* global autoconfigured region for contiguous allocations */ + ramoops@7400000 { + compatible = "ramoops"; + reg = <0x0 0x07400000 0x0 0x00100000>; + record-size = <0x20000>; + console-size = <0x40000>; + ftrace-size = <0x80000>; + pmsg-size = <0x20000>; + }; + + dmc_reserved:linux,dmc_monitor { + compatible = "amlogic,dmc_monitor-reserved"; + reg = <0x0 0x0 0x0 0x80000>; + }; + + debug_reserved:linux,iotrace { + compatible = "amlogic, iotrace"; + reg = <0x0 0x04f00000 0x0 0x00100000>; + io-size = <0x1b000>; + sched-size = <0x2000>; + irq-size = <0x1000>; + smc-size = <0x1000>; + misc-size = <0x1000>; + }; + + defendkey_reserved:linux,defendkey { + compatible = "amlogic, defendkey"; + reg = <0x0 0x04e00000 0x0 0x100000>; + }; + secmon_reserved:linux,secmon { + compatible = "shared-dma-pool"; + no-map; + size = <0x0 0x400000>; + alignment = <0x0 0x400000>; + alloc-ranges = <0x0 0x05000000 0x0 0x400000>; + }; + logo_reserved:linux,meson-fb { + compatible = "amlogic, meson-fb"; + reusable; + size = <0x0 0x800000>; + alignment = <0x0 0x400000>; + reg = <0x0 0x3e800000 0x0 0x800000>; + }; + ion_cma_reserved:linux,ion-dev { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x0>; + alignment = <0x0 0x400000>; + no-kernel-map; + }; + ion_fb_reserved:linux,ion-fb { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x0>; + alignment = <0x0 0x400000>; + }; + dmaheap_cma_reserved:heap-gfx { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x12c00000>; + alignment = <0x0 0x400000>; + }; + dmaheap_fb_reserved:heap-fb { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x0>; + alignment = <0x0 0x400000>; + }; + //di_reserved:linux,di { + //compatible = "amlogic, di-mem"; + /* buffer_size = 3621952(yuv422 8bit) */ + /* 4179008(yuv422 10bit full pack mode) */ + /** 10x3621952=34.6M(0x23) support 8bit **/ + /** 10x4736064=45.2M(0x2e) support 12bit **/ + /** 10x4179008=40M(0x28) support 10bit **/ + //size = <0x0 0x2800000>; + //no-map; + //}; + /*di CMA pool */ + di_cma_reserved:linux,di_cma { + compatible = "shared-dma-pool"; + reusable; + /* buffer_size = 3621952(yuv422 8bit) + * | 4736064(yuv422 10bit) + * | 4074560(yuv422 10bit full pack mode) + * 10x3621952=34.6M(0x23) support 8bit + * 10x4736064=45.2M(0x2e) support 12bit + * 10x4074560=40M(0x28) support 10bit + */ + //size = <0x0 0x02800000>; + alignment = <0x0 0x400000>; + }; + /* POST PROCESS MANAGER */ + ppmgr_reserved:linux,ppmgr { + compatible = "shared-dma-pool"; + size = <0x0 0x0>; + }; + + codec_mm_cma:linux,codec_mm_cma { + compatible = "shared-dma-pool"; + reusable; + /* ion_codec_mm max can alloc size 80M*/ + size = <0x0 0x13400000>; + alignment = <0x0 0x400000>; + linux,contiguous-region; + }; + /* codec shared reserved */ + codec_mm_reserved:linux,codec_mm_reserved { + compatible = "amlogic, codec-mm-reserved"; + size = <0x0 0x0>; + alignment = <0x0 0x100000>; + //no-map; + }; + /* vdin0 CMA pool */ + vdin0_cma_reserved:linux,vdin0_cma { + compatible = "shared-dma-pool"; + reusable; + /* 1920x1080x2x4 =16+4 M */ + size = <0x0 0x04000000>; + alignment = <0x0 0x400000>; + }; + /* vdin1 CMA pool */ + vdin1_cma_reserved:linux,vdin1_cma { + compatible = "shared-dma-pool"; + reusable; + /* up to 1920x1080 yuv422 8bit and 5 buffers + * 1920x1080x2x5 = 20 M + */ + size = <0x0 0x01400000>; + alignment = <0x0 0x400000>; + }; + vm0_cma_reserved:linux,vm0_cma { + compatible = "shared-dma-pool"; + reusable; + size = <0x0 0x4000000>; + alignment = <0x0 0x400000>; + }; + }; + + galcore { + status = "okay"; + }; + gpioleds { + compatible = "gpio-leds"; + status = "disabled"; + + sys_led { + label="sys_led"; + gpios=<&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + default-state ="on"; + }; + }; + + cvbsout { + compatible = "amlogic, cvbsout-sm1"; + dev_name = "cvbsout"; + status = "okay"; + //clocks = <&clkc CLKID_VCLK2_ENCI + // &clkc CLKID_VCLK2_VENCI0 + // &clkc CLKID_VCLK2_VENCI1 + // &clkc CLKID_DAC_CLK>; + //clock-names = "venci_top_gate", + // "venci_0_gate", + // "venci_1_gate", + // "vdac_clk_gate"; + /* clk path */ + /* 0:vid_pll vid2_clk */ + /* 1:gp0_pll vid2_clk */ + /* 2:vid_pll vid1_clk */ + /* 3:gp0_pll vid1_clk */ + clk_path = <0>; + + /* performance: reg_address, reg_value */ + /* sm1 */ + performance = <0x1bf0 0x9 + 0x1b56 0x333 + 0x1b12 0x8080 + 0x1b05 0xfd + 0x1c59 0xf850 + 0xffff 0x0>; /* ending flag */ + performance_sarft = <0x1bf0 0x9 + 0x1b56 0x333 + 0x1b12 0x0 + 0x1b05 0x9 + 0x1c59 0xfc48 + 0xffff 0x0>; /* ending flag */ + performance_revB_telecom = <0x1bf0 0x9 + 0x1b56 0x546 + 0x1b12 0x8080 + 0x1b05 0x9 + 0x1c59 0xf850 + 0xffff 0x0>; /* ending flag */ + }; + + bt-dev{ + compatible = "amlogic, aml-bt"; + dev_name = "bt-dev"; + status = "okay"; + reset-gpios = <&gpio GPIOX_17 GPIO_ACTIVE_HIGH>; + hostwake-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_HIGH>; + power_down_disable = <1>; + }; + + wifi{ + compatible = "amlogic, aml-wifi"; + dev_name = "aml_wifi"; + status = "okay"; + interrupt-gpios = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; + irq_trigger_type = "IRQF_TRIGGER_LOW"; + power_on-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_HIGH>; + wifi_static_buf = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_e_pins>; + pwm_config = <&wifi_pwm_conf>; + }; + + wifi_pwm_conf:wifi_pwm_conf{ + pwm_channel1_conf { + pwms = <&pwm_ef MESON_PWM_0 30541 0>; + duty-cycle = <15270>; + times = <10>; + }; + pwm_channel2_conf { + pwms = <&pwm_ef MESON_PWM_2 30500 0>; + duty-cycle = <15250>; + times = <12>; + }; + }; + + codec_mm { + compatible = "amlogic, codec, mm"; + memory-region = <&codec_mm_cma &codec_mm_reserved>; + dev_name = "codec_mm"; + status = "okay"; + }; + + picdec_cma_reserved:linux,picdec { + compatible = "shared-dma-pool"; + reusable; + size = <0x0>; + alignment = <0x0>; + linux,contiguous-region; + }; + + picdec { + compatible = "amlogic, picdec"; + memory-region = <&picdec_cma_reserved>; + dev_name = "picdec"; + status = "disabled"; + }; + + ppmgr { + compatible = "amlogic, ppmgr"; + memory-region = <&ppmgr_reserved>; + dev_name = "ppmgr"; + status = "okay"; + }; + + deinterlace { + compatible = "amlogic, deinterlace"; + status = "disabled"; + /* 0:use reserved; 1:use cma; 2:use cma as reserved */ + flag_cma = <4>; //<1>; + //memory-region = <&di_reserved>; + memory-region = <&di_cma_reserved>; + interrupts = <0 46 1 + 0 40 1>; + interrupt-names = "pre_irq", "post_irq"; + //clocks = <&clkc CLKID_VPU_CLKB_TMP>, + // <&clkc CLKID_VPU_CLKB>; + //clock-names = "vpu_clkb", + // "vpu_mux"; + clock-range = <334 667>; + /* buffer-size = <3621952>;(yuv422 8bit) */ + buffer-size = <4074560>;/*yuv422 fullpack*/ + /* reserve-iomap = "true"; */ + /* if enable nr10bit, set nr10bit-support to 1 */ + post-wr-support = <1>; + nr10bit-support = <1>; + nrds-enable = <1>; + pps-enable = <1>; + }; + multi-di { + compatible = "amlogic, dim-sm1"; + status = "okay"; + /* 0:use reserved; 1:use cma; 2:use cma as reserved */ + flag_cma = <4>; //<1>; + //memory-region = <&di_reserved>; + memory-region = <&di_cma_reserved>; + interrupts = <0 46 1 + 0 40 1>; + interrupt-names = "pre_irq", "post_irq"; + clocks = <&clkc CLKID_VPU_CLKB_TMP>, + <&clkc CLKID_VPU_CLKB>; + clock-names = "vpu_clkb", + "vpu_mux"; + clock-range = <334 667>; + /* buffer-size = <3621952>;(yuv422 8bit) */ + buffer-size = <4074560>;/*yuv422 fullpack*/ + /* reserve-iomap = "true"; */ + /* if enable nr10bit, set nr10bit-support to 1 */ + post-wr-support = <1>; + nr10bit-support = <1>; + nrds-enable = <1>; + pps-enable = <1>; + }; + + ionvideo { + compatible = "amlogic, ionvideo"; + dev_name = "ionvideo"; + status = "okay"; + }; + amlvideo2_0 { + compatible = "amlogic, amlvideo2"; + dev_name = "amlvideo2"; + status = "okay"; + amlvideo2_id = <0>; + cma_mode = <1>; + }; + amlvideo2_1 { + compatible = "amlogic, amlvideo2"; + dev_name = "amlvideo2"; + status = "okay"; + amlvideo2_id = <1>; + cma_mode = <1>; + }; + + vm0 { + compatible = "amlogic, vm"; + memory-region = <&vm0_cma_reserved>; + dev_name = "vm0"; + status = "okay"; + vm_id = <0>; + }; + + amvdec_656in { + /*bt656 gpio conflict with i2c0*/ + compatible = "amlogic, amvdec_656in"; + dev_name = "amvdec_656in"; + status = "okay"; + reg = <0x0 0xffe02000 0x0 0x7c>; + //clocks = <&clkc CLKID_BT656_COMP>, + // <&clkc CLKID_BT656>; + //clock-names = "cts_bt656_clk1", + // "clk_gate_bt656"; + /* bt656in1, bt656in2 */ + bt656in1 { + bt656_id = <1>; + status = "okay"; + }; + }; + + aml_cams { + compatible = "amlogic, cams_prober"; + status = "okay"; + pinctrl-names="default"; + pinctrl-0=<&clk12_24_z_pins>; + clocks = <&clkc CLKID_24M_CLK_GATE>; + clock-names = "g12a_24m"; + cam_0{ + cam_name = "ov5640"; + front_back = <0>; + camera-i2c-bus = <&i2c2>; + camvdd-gpios = <&gpio GPIOZ_5 GPIO_ACTIVE_HIGH>; + gpio_pwdn-gpios = <&gpio GPIOZ_6 GPIO_ACTIVE_HIGH>; + gpio_rst-gpios = <&gpio GPIOZ_12 GPIO_ACTIVE_HIGH>; + mirror_flip = <1>; + vertical_flip = <1>; + spread_spectrum = <0>; + bt_path = "csi"; + interface = "mipi"; + clk_channel = "a"; + bt_path_count = <1>; + status = "okay"; + }; + }; + + amvdec_csi { + compatible = "amlogic, amvdec_csi"; + status = "okay"; + csi_id = <0>; + reg = <0x0 0xff650000 0x0 0x00000100>, + <0x0 0xffe0c000 0x0 0x00000100>, + <0x0 0xffe0d000 0x0 0x00000100>; + reg-names = "csi_phy", "csi_host", "csi_adapt"; + clocks = <&clkc CLKID_CSI_ADAPT_CLK>, + <&clkc CLKID_MIPI_CSI_PHY_CLK0>; + clock-names = "cts_csi_adapt_clk_composite", + "cts_csi_phy_clk_composite"; + power-domains = <&pwrdm PWRC_SM1_CSI_ID>; + /* interrupts = <0 1 0>; */ + /* interrupt-names = "csi_phy"; */ + }; + + gpio_keypad{ + compatible = "amlogic, gpio_keypad"; + status = "okay"; + scan_period = <20>; + key_num = <1>; + key_name = "power"; + key_code = <116>; + key-gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; + detect_mode = <0>;/*0:polling mode, 1:irq mode*/ + }; + + adc_keypad { + compatible = "amlogic, adc_keypad"; + status = "okay"; + key_name = "vol-", "vol+", "enter"; + key_num = <3>; + io-channels = <&saradc SARADC_CH2>; + io-channel-names = "key-chan-2"; + key_chan = ; + key_code = <114 115 97>; + key_val = <252 468 684>; // Unit: millivolt + key_tolerance = <70 70 70>; // Unit: millivolt + }; + + unifykey{ + compatible = "amlogic,unifykey"; + status = "ok"; + unifykey-num = <17>; + unifykey-index-0 = <&keysn_0>; + unifykey-index-1 = <&keysn_1>; + unifykey-index-2 = <&keysn_2>; + unifykey-index-3 = <&keysn_3>; + unifykey-index-4 = <&keysn_4>; + unifykey-index-5 = <&keysn_5>; + unifykey-index-6 = <&keysn_6>; + unifykey-index-7 = <&keysn_7>; + unifykey-index-8 = <&keysn_8>; + unifykey-index-9 = <&keysn_9>; + unifykey-index-10= <&keysn_10>; + unifykey-index-11= <&keysn_11>; + unifykey-index-12= <&keysn_12>; + unifykey-index-13= <&keysn_13>; + unifykey-index-14= <&keysn_14>; + unifykey-index-15= <&keysn_15>; + unifykey-index-16= <&keysn_16>; + + keysn_0: key_0{ + key-name = "usid"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_1:key_1{ + key-name = "mac"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_2:key_2{ + key-name = "hdcp"; + key-device = "secure"; + key-type = "sha1"; + key-permit = "read","write","del"; + }; + keysn_3:key_3{ + key-name = "secure_boot_set"; + key-device = "efuse"; + key-permit = "write"; + }; + keysn_4:key_4{ + key-name = "mac_bt"; + key-device = "normal"; + key-permit = "read","write","del"; + key-type = "mac"; + }; + keysn_5:key_5{ + key-name = "mac_wifi"; + key-device = "normal"; + key-permit = "read","write","del"; + key-type = "mac"; + }; + keysn_6:key_6{ + key-name = "hdcp2_tx"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_7:key_7{ + key-name = "hdcp2_rx"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_8:key_8{ + key-name = "widevinekeybox"; + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_9:key_9{ + key-name = "deviceid"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_10:key_10{ + key-name = "hdcp22_fw_private"; + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_11:key_11{ + key-name = "PlayReadykeybox25"; + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_12:key_12{ + key-name = "prpubkeybox";// PlayReady + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_13:key_13{ + key-name = "prprivkeybox";// PlayReady + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_14:key_14{ + key-name = "attestationkeybox";// attestation key + key-device = "secure"; + key-permit = "read","write","del"; + }; + keysn_15:key_15{ + key-name = "region_code"; + key-device = "normal"; + key-permit = "read","write","del"; + }; + keysn_16:key_16{ + key-name = "netflix_mgkid"; + key-device = "secure"; + key-permit = "read","write","del"; + }; + };//End unifykey + + efusekey:efusekey{ + keynum = <4>; + key0 = <&key_0>; + key1 = <&key_1>; + key2 = <&key_2>; + key3 = <&key_3>; + key_0:key_0{ + keyname = "mac"; + offset = <0>; + size = <6>; + }; + key_1:key_1{ + keyname = "mac_bt"; + offset = <6>; + size = <6>; + }; + key_2:key_2{ + keyname = "mac_wifi"; + offset = <12>; + size = <6>; + }; + key_3:key_3{ + keyname = "usid"; + offset = <18>; + size = <16>; + }; + };//End efusekey + + amlvecm { + compatible = "amlogic, vecm-sm1"; + dev_name = "aml_vecm"; + status = "okay"; + gamma_en = <0>;/*1:enable ;0:disable*/ + wb_en = <0>;/*1:enable ;0:disable*/ + cm_en = <0>;/*1:enable ;0:disable*/ + /*0: 709/601 1: bt2020*/ + tx_op_color_primary = <0>; + }; + + amdolby_vision { + compatible = "amlogic, dolby_vision_sm1"; + dev_name = "aml_amdolby_vision_driver"; + status = "okay"; + tv_mode = <0>;/*1:enable ;0:disable*/ + }; + + /* Audio Related start */ + pdm_codec:dummy{ + #sound-dai-cells = <0>; + compatible = "amlogic, pdm_dummy_codec"; + status = "okay"; + }; + dummy_codec:dummy{ + #sound-dai-cells = <0>; + compatible = "amlogic, aml_dummy_codec"; + status = "okay"; + }; + amlogic_codec:t9015{ + #sound-dai-cells = <0>; + compatible = "amlogic, aml_codec_T9015"; + reg = <0x0 0xFF632000 0x0 0x2000>; + is_auge_used = <1>; /* meson or auge chipset used */ + tocodec_inout = <1>; + tdmout_index = <1>; + ch0_sel = <0>; + ch1_sel = <1>; + + status = "okay"; + }; + + auge_sound { + compatible = "amlogic, auge-sound-card"; + aml-audio-card,name = "AML-AUGESOUND"; + + /*avout mute gpio*/ + avout_mute-gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + + aml-audio-card,dai-link@0 { + format = "i2s";// "dsp_a"; + mclk-fs = <256>; + //continuous-clock; + //bitclock-inversion; + //frame-inversion; + /* master mode */ + bitclock-master = <&tdmb>; + frame-master = <&tdmb>; + /* slave mode */ + //bitclock-master = <&tdmbcodec>; + //frame-master = <&tdmbcodec>; + /* suffix-name, sync with android audio hal + * what's the dai link used for + */ + suffix-name = "alsaPORT-i2s"; + cpu { + sound-dai = <&tdmb>; + dai-tdm-slot-tx-mask = <1 1>; + dai-tdm-slot-rx-mask = <1 1>; + dai-tdm-slot-num = <2>; + /* + * dai-tdm-slot-tx-mask = + * <1 1 1 1 1 1 1 1>; + * dai-tdm-slot-rx-mask = + * <1 1 1 1 1 1 1 1>; + * dai-tdm-slot-num = <8>; + */ + dai-tdm-slot-width = <32>; + system-clock-frequency = <12288000>; + }; + tdmbcodec: codec { + sound-dai = <&dummy_codec + &amlogic_codec &ad82584f_62>; + }; + }; + + aml-audio-card,dai-link@1 { + format = "dsp_a"; + mclk-fs = <512>; + //continuous-clock; + //bitclock-inversion; + //frame-inversion; + /* master mode */ + bitclock-master = <&tdma>; + frame-master = <&tdma>; + /* slave mode */ + /* + * bitclock-master = <&tdmacodec>; + * frame-master = <&tdmacodec>; + */ + suffix-name = "alsaPORT-pcm"; + tdmacpu: cpu { + sound-dai = <&tdma>; + dai-tdm-slot-tx-mask = + <1 1 1 1 1 1 1 1>; + dai-tdm-slot-rx-mask = + <1 1 1 1 1 1 1 1>; + dai-tdm-slot-num = <8>; + dai-tdm-slot-width = <32>; + system-clock-frequency = <24576000>; + }; + tdmacodec: codec { + sound-dai = <&dummy_codec &dummy_codec>; + }; + }; + + aml-audio-card,dai-link@2 { + format = "i2s"; + mclk-fs = <256>; + //continuous-clock; + //bitclock-inversion; + //frame-inversion; + /* master mode */ + bitclock-master = <&tdmc>; + frame-master = <&tdmc>; + /* slave mode */ + //bitclock-master = <&tdmccodec>; + //frame-master = <&tdmccodec>; + /* suffix-name, sync with android audio hal used for */ + //suffix-name = "alsaPORT-tdm"; + cpu { + sound-dai = <&tdmc>; + dai-tdm-slot-tx-mask = <1 1>; + dai-tdm-slot-rx-mask = <1 1>; + dai-tdm-slot-num = <2>; + dai-tdm-slot-width = <32>; + system-clock-frequency = <12288000>; + }; + tdmccodec: codec { + sound-dai = <&dummy_codec>; + }; + }; + + aml-audio-card,dai-link@3 { + mclk-fs = <64>; + /* suffix-name, sync with android audio hal + * what's the dai link used for + */ + suffix-name = "alsaPORT-pdm-builtinmic"; + cpu { + sound-dai = <&pdm>; + }; + codec { + sound-dai = <&pdm_codec>; + }; + }; + + aml-audio-card,dai-link@4 { + mclk-fs = <128>; + /* suffix-name, sync with android audio hal used for */ + suffix-name = "alsaPORT-spdif"; + cpu { + sound-dai = <&spdifa>; + system-clock-frequency = <6144000>; + }; + codec { + sound-dai = <&dummy_codec>; + }; + }; + + aml-audio-card,dai-link@5 { + mclk-fs = <128>; + continuous-clock; + /* suffix-name, sync with android audio hal + * what's the dai link used for + */ + suffix-name = "alsaPORT-spdifb"; + cpu { + sound-dai = <&spdifb>; + system-clock-frequency = <6144000>; + }; + codec { + sound-dai = <&dummy_codec>; + }; + }; +/* + * aml-audio-card,dai-link@6 { + * mclk-fs = <256>; + * suffix-name = "alsaPORT-earc"; + * cpu { + * sound-dai = <&earc>; + * system-clock-frequency = <12288000>; + * }; + * codec { + * sound-dai = <&dummy_codec>; + * }; + * }; + */ + aml-audio-card,dai-link@7 { + mclk-fs = <256>; + continuous-clock; + suffix-name = "alsaPORT-loopback"; + cpu { + sound-dai = <&loopbacka>; + system-clock-frequency = <12288000>; + }; + codec { + sound-dai = <&dummy_codec>; + }; + }; + }; + audiolocker: locker { + compatible = "amlogic, audiolocker"; + clocks = <&clkaudio CLKID_AUDIO_LOCKER_OUT + &clkaudio CLKID_AUDIO_LOCKER_IN + &clkaudio CLKID_AUDIO_MCLK_D + &clkaudio CLKID_AUDIO_MCLK_E + &clkc CLKID_MPLL1 + &clkc CLKID_MPLL2>; + clock-names = "lock_out", "lock_in", "out_src", + "in_src", "out_calc", "in_ref"; + interrupts = ; + interrupt-names = "irq"; + frequency = <49000000>; /* pll */ + dividor = <49>; /* locker's parent */ + status = "disabled"; + }; + /* Audio Related end */ + + demux { + compatible = "amlogic, dvb-demux"; + dev_name = "dvb-demux"; + status = "disabled"; + + /*"parallel","serial","disable"*/ +// ts2 = "parallel"; +// ts2_control = <0>; +// ts2_invert = <0>; + interrupts = <0 23 1 + 0 5 1 + 0 53 1 + 0 19 1 + 0 25 1 + 0 18 1 + 0 24 1>; + interrupt-names = "demux0_irq", + "demux1_irq", + "demux2_irq", + "dvr0_irq", + "dvr1_irq", + "dvrfill0_fill", + "dvrfill1_flush"; + //clocks = <&clkc CLKID_DEMUX + // &clkc CLKID_AHB_ARB0 + // &clkc CLKID_DOS_PARSER>; + //clock-names = "demux", "ahbarb0", "uparsertop"; + }; + + vbat: fixedregulator@vbat { + compatible = "regulator-fixed"; + regulator-name = "12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc5v_reg: fixedregulator@vcc5v { + vin-supply = <&vbat>; + compatible = "regulator-fixed"; + regulator-name = "VCC_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + pinctrl-names = "default"; + //GPIOH_8(OD) Set: + // Output disable= Enable VCC5V + //gpio = <&gpio GPIOH_8 GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + }; + + vddq_reg: fixedregulator@vddq { + compatible = "regulator-fixed"; + vin-supply = <&vbat>; + regulator-name = "VDDQ"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + + vddao3v3_reg: fixedregulator@vddao3v3 { + vin-supply = <&vbat>; + compatible = "regulator-fixed"; + regulator-name = "VDDAO_3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + vcc3v3_reg: fixedregulator@vcc3v3 { + compatible = "regulator-fixed"; + vin-supply = <&vddao3v3_reg>; + regulator-name = "VCC3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-names = "default"; + //TEST_N(High) Set: + //Output L= Disable VCC3.3V + //Output H= Enable VCC3.3V + gpio = <&gpio_ao GPIO_TEST_N GPIO_ACTIVE_HIGH>; + startup-delay-us = <70000>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + }; + + vcc1v8_reg: fixedregulator@vcc1v8 { + vin-supply = <&vcc3v3_reg>; + compatible = "regulator-fixed"; + regulator-name = "VCC1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + flash_1v8_reg: fixedregulator@flash_1v8 { + vin-supply = <&vcc3v3_reg>; + compatible = "regulator-fixed"; + regulator-name = "FLASH_1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vddio_ao18_reg: fixedregulator@vddio_ao18 { + vin-supply = <&vddao3v3_reg>; + compatible = "regulator-fixed"; + regulator-name = "VDDIO_AO18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + vddio_c: sdcard-1v8_3v3 { + compatible = "regulator-gpio"; + regulator-name = "VDDIO_C"; + vin-supply = <&vddao3v3_reg>; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + // L/HiZ: 3.3V, H: 1.8V + gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; + gpios-states = <0>; + regulator-boot-on; + //regulator-always-on; + + /* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */ + states = <1800000 1 + 3300000 0>; + }; + + cpu_opp_table0: cpu_opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <760000>; + }; + opp01 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <760000>; + }; + opp02 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <760000>; + }; + opp03 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <780000>; + }; + opp04 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <800000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <810000>; + }; + opp06 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <820000>; + }; + opp07 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <830000>; + }; + opp08 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <860000>; + }; + opp09 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <900000>; + }; + opp10 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <940000>; + }; + opp11 { + opp-hz = /bits/ 64 <1908000000>; + opp-microvolt = <1000000>; + }; + }; + + cpu_opp_table1: cpu_opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <760000>; + }; + opp01 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <760000>; + }; + opp02 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <760000>; + }; + opp03 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <780000>; + }; + opp04 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <800000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <810000>; + }; + opp06 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <820000>; + }; + opp07 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <830000>; + }; + opp08 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <860000>; + }; + opp09 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <900000>; + }; + opp10 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <940000>; + }; + opp11 { + opp-hz = /bits/ 64 <1908000000>; + opp-microvolt = <970000>; + }; + }; + + cpu_opp_table2: cpu_opp_table2 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <760000>; + }; + opp01 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <760000>; + }; + opp02 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <760000>; + }; + opp03 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <780000>; + }; + opp04 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <800000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <810000>; + }; + opp06 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <820000>; + }; + opp07 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <830000>; + }; + opp08 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <860000>; + }; + opp09 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <900000>; + }; + opp10 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <910000>; + }; + opp11 { + opp-hz = /bits/ 64 <1908000000>; + opp-microvolt = <910000>; + }; + }; + + cpu_opp_table3: cpu_opp_table3 { + compatible = "operating-points-v2"; + opp-shared; + + opp00 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <760000>; + }; + opp01 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <760000>; + }; + opp02 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <760000>; + }; + opp03 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <780000>; + }; + opp04 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <800000>; + }; + opp05 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <810000>; + }; + opp06 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <820000>; + }; + opp07 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <830000>; + }; + opp08 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <860000>; + }; + opp09 { + opp-hz = /bits/ 64 <1704000000>; + opp-microvolt = <860000>; + }; + opp10 { + opp-hz = /bits/ 64 <1800000000>; + opp-microvolt = <860000>; + }; + opp11 { + opp-hz = /bits/ 64 <1908000000>; + opp-microvolt = <860000>; + }; + }; + + cpufreq-meson { + compatible = "amlogic, cpufreq-meson"; + status = "okay"; + }; + +}; /* end of / */ + +&CPU0 { + /*set multi table cpufreq max*/ + multi_tables_available; + operating-points-v2 = <&cpu_opp_table0>, + <&cpu_opp_table1>, + <&cpu_opp_table2>, + <&cpu_opp_table3>; +}; + +&CPU1 { + /*set multi table cpufreq max*/ + multi_tables_available; + operating-points-v2 = <&cpu_opp_table0>, + <&cpu_opp_table1>, + <&cpu_opp_table2>, + <&cpu_opp_table3>; +}; + +&CPU2 { + /*set multi table cpufreq max*/ + multi_tables_available; + operating-points-v2 = <&cpu_opp_table0>, + <&cpu_opp_table1>, + <&cpu_opp_table2>, + <&cpu_opp_table3>; +}; + +&CPU3 { + /*set multi table cpufreq max*/ + multi_tables_available; + operating-points-v2 = <&cpu_opp_table0>, + <&cpu_opp_table1>, + <&cpu_opp_table2>, + <&cpu_opp_table3>; +}; + +&meson_fb { + status = "disabled"; + display_size_default = <1920 1080 1920 2160 32>; + mem_size = <0x00800000 0x1980000 0x100000 0x100000 0x800000>; + logo_addr = "0x3e800000"; + mem_alloc = <0>; + pxp_mode = <0>; /** 0:normal mode 1:pxp mode */ +}; + +&drm_subsystem { + crtc_masks = <2 1 1>; + dummyl_from_hdmitx = /bits/ 8 <1>; +}; + +&amhdmitx { + status = "okay"; + hdcp_ctl_lvl = <1>; +}; + +&drm_vpu { + status = "okay"; + logo_addr = "0x3e800000"; +}; + +&pwm_AO_cd { + status = "okay"; +}; + +&i2c0 { + status = "disabled"; + pinctrl-names="default"; + pinctrl-0=<&i2c0_master_pins2>; + clock-frequency = <400000>; + + gt9xx@5d { + compatible = "goodix,gt9xx"; + status = "disabled"; + reg = <0x5d>; + reset-gpio = <&gpio GPIOZ_9 0x00>; + irq-gpio = <&gpio GPIOZ_3 0x00>; + }; + + ftxx@38 { + compatible = "focaltech,fts"; + status = "disabled"; + reg = <0x38>; + reset-gpio = <&gpio GPIOZ_9 0x00>; + irq-gpio = <&gpio GPIOZ_3 0x00>; + x_max = <600>; + y_max = <1024>; + max-touch-number = <10>; + }; +}; + +&i2c2 { + status = "okay"; + pinctrl-names="default"; + pinctrl-0=<&i2c2_master_pins3>; + clock-frequency = <100000>; + ov5640@3c { + compatible = "ov5640"; + reg = <0x3c>; + //reg = <0x6c>; + status = "okay"; + }; +}; + +&i2c3 { + status = "okay"; + pinctrl-names="default"; + pinctrl-0=<&i2c3_master_pins2>; + clock-frequency = <100000>; /* default 100k */ + + aw9523: aw9523_led@5b { + compatible = "amlogic,aw9523b_led"; + reg = <0x5b>; + status = "okay"; + // reset-gpio = <&gpio GPIOD_11 GPIO_ACTIVE_HIGH>; + platform = <4>; + + led1 { + default_colors = <0 0 0>; + r_io_number = <0>; + g_io_number = <1>; + b_io_number = <2>; + }; + + led2 { + default_colors = <0 0 0>; + r_io_number = <3>; + g_io_number = <4>; + b_io_number = <5>; + }; + + led3 { + default_colors = <0 0 0>; + r_io_number = <6>; + g_io_number = <7>; + b_io_number = <8>; + }; + + led4 { + default_colors = <0 0 0>; + r_io_number = <9>; + g_io_number = <10>; + b_io_number = <11>; + }; + }; + /* for ref board */ + ad82584f_62: ad82584f_62@31 { + compatible = "ESMT, ad82584f"; + #sound-dai-cells = <0>; + reg = <0x31>; + status = "okay"; + reset_pin = <&gpio GPIOA_5 0>; + no_mclk; + }; +}; + +&audiobus { + tdma: tdm@0 { + compatible = "amlogic, sm1-snd-tdma"; + #sound-dai-cells = <0>; + dai-tdm-lane-slot-mask-in = <0 1>; + dai-tdm-oe-lane-slot-mask-out = <1 0>; + dai-tdm-clk-sel = <0>; + clocks = <&clkaudio CLKID_AUDIO_MCLK_A + &clkc CLKID_MPLL0>; + clock-names = "mclk", "clk_srcpll"; + pinctrl-names = "tdm_pins"; + pinctrl-0 = <&tdmout_a &tdmin_a>; + + status = "okay"; + }; + + tdmb: tdm@1 { + compatible = "amlogic, sm1-snd-tdmb"; + #sound-dai-cells = <0>; + dai-tdm-lane-slot-mask-in = <0 1 0 0>; + dai-tdm-lane-slot-mask-out = <1 0 0 0>; + dai-tdm-clk-sel = <1>; + clocks = <&clkaudio CLKID_AUDIO_MCLK_B + &clkc CLKID_MPLL1 + &clkc CLKID_MPLL0 + &clkaudio CLKID_AUDIO_SPDIFOUT_A>; + clock-names = "mclk", "clk_srcpll", + "samesource_srcpll", "samesource_clk"; + pinctrl-names = "tdm_pins"; + pinctrl-0 = <&tdmout_b &tdm_b_clk_pins>; + /* + * 0: tdmout_a; + * 1: tdmout_b; + * 2: tdmout_c; + * 3: spdifout; + * 4: spdifout_b; + */ + samesource_sel = <3>; + + /*enable default mclk(12.288M), before extern codec start*/ + start_clk_enable = <1>; + + /*tdm clk tuning enable*/ + clk_tuning_enable = <1>; + + status = "okay"; + }; + + tdmc: tdm@2 { + compatible = "amlogic, sm1-snd-tdmc"; + #sound-dai-cells = <0>; + dai-tdm-lane-slot-mask-in = <1 0 0 0>; + #dai-tdm-lane-slot-mask-out = <1 0 1 1>; + #dai-tdm-lane-oe-slot-mask-in = <0 0 0 0>; + #dai-tdm-lane-oe-slot-mask-out = <1 0 0 0>; + dai-tdm-clk-sel = <2>; + + clocks = <&clkaudio CLKID_AUDIO_MCLK_C + &clkc CLKID_MPLL2>; + clock-names = "mclk", "clk_srcpll"; + pinctrl-names = "tdm_pins"; + pinctrl-0 = <&tdmc_mclk &tdmout_c &tdmin_c>; + + status = "okay"; + }; + + tdmlb:tdm@3 { + compatible = "amlogic, sm1-snd-tdmlb"; + #sound-dai-cells = <0>; + + dai-tdm-lane-lb-slot-mask-in = <1 0 0 0>; + dai-tdm-clk-sel = <1>; + + clocks = <&clkaudio CLKID_AUDIO_MCLK_B + &clkc CLKID_MPLL1>; + clock-names = "mclk", "clk_srcpll"; + + /* + * select tdmin_lb src; + * AXG + * 0: TDMOUTA + * 1: TDMOUTB + * 2: TDMOUTC + * 3: PAD_TDMINA + * 4: PAD_TDMINB + * 5: PAD_TDMINC + * + * G12A/G12B + * 0: TDMOUTA + * 1: TDMOUTB + * 2: TDMOUTC + * 3: PAD_TDMINA_DIN* + * 4: PAD_TDMINB_DIN* + * 5: PAD_TDMINC_DIN* + * 6: PAD_TDMINA_D*, oe pin + * 7: PAD_TDMINB_D*, oe pin + * + * TL1/SM1 + * 0: TDMOUTA + * 1: TDMOUTB + * 2: TDMOUTC + * 3: PAD_TDMINA_DIN* + * 4: PAD_TDMINB_DIN* + * 5: PAD_TDMINC_DIN* + * 6: PAD_TDMINA_D* + * 7: PAD_TDMINB_D* + * 8: PAD_TDMINC_D* + * 9: HDMIRX_I2S + * 10: ACODEC_ADC + */ + lb-src-sel = <1>; + + status = "disabled"; + }; + + spdifa: spdif@0 { + compatible = "amlogic, sm1-snd-spdif-a"; + #sound-dai-cells = <0>; + clocks = <&clkc CLKID_MPLL0 + &clkc CLKID_FCLK_DIV4 + &clkaudio CLKID_AUDIO_GATE_SPDIFIN + &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A + &clkaudio CLKID_AUDIO_SPDIFIN + &clkaudio CLKID_AUDIO_SPDIFOUT_A>; + clock-names = "sysclk", "fixed_clk", "gate_spdifin", + "gate_spdifout", "clk_spdifin", "clk_spdifout"; + interrupts = + ; + + interrupt-names = "irq_spdifin"; + pinctrl-names = "spdif_pins"; + pinctrl-0 = <&spdifout /* &spdifin */>; + + /*spdif clk tuning enable*/ + clk_tuning_enable = <1>; + + status = "okay"; + }; + spdifb: spdif@1 { + compatible = "amlogic, sm1-snd-spdif-b"; + #sound-dai-cells = <0>; + clocks = <&clkc CLKID_MPLL0 /*CLKID_HIFI_PLL*/ + &clkaudio CLKID_AUDIO_GATE_SPDIFOUT_B + &clkaudio CLKID_AUDIO_SPDIFOUT_B>; + clock-names = "sysclk", + "gate_spdifout", "clk_spdifout"; + + status = "okay"; + }; + pdm: pdm { + compatible = "amlogic, sm1-snd-pdm"; + #sound-dai-cells = <0>; + + clocks = <&clkaudio CLKID_AUDIO_GATE_PDM + &clkc CLKID_FCLK_DIV3 + &clkc CLKID_HIFI_PLL + &clkaudio CLKID_AUDIO_PDMIN0 + &clkaudio CLKID_AUDIO_PDMIN1>; + clock-names = "gate", + "sysclk_srcpll", + "dclk_srcpll", + "pdm_dclk", + "pdm_sysclk"; + src-clk-freq = <491520000>; + pinctrl-names = "pdm_pins"; + pinctrl-0 = <&pdmin>; + + /* mode 0~4, defalut:1 */ + filter_mode = <1>; + + status = "okay"; + }; + + asrca: resample@0 { + compatible = "amlogic, sm1-resample"; + clocks = <&clkc CLKID_MPLL3 + &clkaudio CLKID_AUDIO_MCLK_F + &clkaudio CLKID_AUDIO_RESAMPLE_A>; + clock-names = "resample_pll", "resample_src", "resample_clk"; + /*same with toddr_src + * TDMIN_A, 0 + * TDMIN_B, 1 + * TDMIN_C, 2 + * SPDIFIN, 3 + * PDMIN, 4 + * NONE, + * TDMIN_LB, 6 + * LOOPBACK, 7 + */ + resample_module = <4>; + status = "disabled"; + }; + + vad:vad { + compatible = "amlogic, snd-vad"; + #sound-dai-cells = <0>; + + clocks = <&clkaudio CLKID_AUDIO_GATE_TOVAD + &clkc CLKID_HIFI_PLL + &clkaudio CLKID_AUDIO_VAD>; + clock-names = "gate", "pll", "clk"; + + interrupts = ; + interrupt-names = "irq_wakeup", "irq_frame_sync"; + + /* + * Data src sel: + * 0: tdmin_a; + * 1: tdmin_b; + * 2: tdmin_c; + * 3: spdifin; + * 4: pdmin; + * 5: loopback_b; + * 6: tdmin_lb; + * 7: loopback_a; + */ + src = <4>; + + /* + * deal with hot word in user space or kernel space + * 0: in user space + * 1: in kernel space + */ + level = <1>; + + status = "okay"; + }; + + loopbacka:loopback@0 { + compatible = "amlogic, sm1-loopbacka"; + #sound-dai-cells = <0>; + + clocks = <&clkaudio CLKID_AUDIO_GATE_PDM + &clkc CLKID_FCLK_DIV3 + &clkc CLKID_HIFI_PLL + &clkaudio CLKID_AUDIO_PDMIN0 + &clkaudio CLKID_AUDIO_PDMIN1 + &clkc CLKID_MPLL1 + &clkaudio CLKID_AUDIO_MCLK_B>; + clock-names = "pdm_gate", + "pdm_sysclk_srcpll", + "pdm_dclk_srcpll", + "pdm_dclk", + "pdm_sysclk", + "tdminlb_mpll", + "tdminlb_mclk"; + + /* datain src + * 0: tdmin_a; + * 1: tdmin_b; + * 2: tdmin_c; + * 3: spdifin; + * 4: pdmin; + */ + datain_src = <4>; + datain_chnum = <6>; + datain_chmask = <0x3f>; + /* config which data pin for loopback */ + datain-lane-mask-in = <1 1 1 0>; + src-clk-freq = <491520000>; + + /* calc mclk for datalb */ + mclk-fs = <256>; + + /* tdmin_lb src + * 0: tdmoutA + * 1: tdmoutB + * 2: tdmoutC + * 3: PAD_TDMINA_DIN*, refer to core pinmux + * 4: PAD_TDMINB_DIN*, refer to core pinmux + * 5: PAD_TDMINC_DIN*, refer to core pinmux + * 6: PAD_TDMINA_D*, oe, refer to core pinmux + * 7: PAD_TDMINB_D*, oe, refer to core pinmux + */ + /* if tdmin_lb >= 3, use external loopback */ + datalb_src = <1>; + datalb_chnum = <2>; + datalb_chmask = <0x3>; + /* config which data pin as loopback */ + datalb-lane-mask-in = <1 0 0 0>; + + status = "okay"; + }; + + loopbackb:loopback@1 { + compatible = "amlogic, sm1-loopbackb"; + #sound-dai-cells = <0>; + + clocks = <&clkaudio CLKID_AUDIO_GATE_PDM + &clkc CLKID_FCLK_DIV3 + &clkc CLKID_MPLL3 + &clkaudio CLKID_AUDIO_PDMIN0 + &clkaudio CLKID_AUDIO_PDMIN1 + &clkc CLKID_MPLL1 + &clkaudio CLKID_AUDIO_MCLK_B>; + clock-names = "pdm_gate", + "pdm_sysclk_srcpll", + "pdm_dclk_srcpll", + "pdm_dclk", + "pdm_sysclk", + "tdminlb_mpll", + "tdminlb_mclk"; + + /* calc mclk for datain_lb */ + mclk-fs = <256>; + + /* datain src + * 0: tdmin_a; + * 1: tdmin_b; + * 2: tdmin_c; + * 3: spdifin; + * 4: pdmin; + */ + datain_src = <4>; + datain_chnum = <4>; + datain_chmask = <0xf>; + /* config which data pin for loopback */ + datain-lane-mask-in = <1 0 1 0>; + + /* tdmin_lb src + * 0: tdmoutA + * 1: tdmoutB + * 2: tdmoutC + * 3: PAD_TDMINA_DIN*, refer to core pinmux + * 4: PAD_TDMINB_DIN*, refer to core pinmux + * 5: PAD_TDMINC_DIN*, refer to core pinmux + * 6: PAD_TDMINA_D*, oe, refer to core pinmux + * 7: PAD_TDMINB_D*, oe, refer to core pinmux + */ + /* if tdmin_lb >= 3, use external loopback */ + datalb_src = <1>; + datalb_chnum = <2>; + datalb_chmask = <0x3>; + /* config which data pin as loopback */ + datalb-lane-mask-in = <1 0 0 0>; + + status = "disabled"; + }; + aed:effect { + compatible = "amlogic, snd-effect-v3"; + #sound-dai-cells = <0>; + clocks = <&clkaudio CLKID_AUDIO_GATE_EQDRC + &clkc CLKID_FCLK_DIV5 + &clkaudio CLKID_AUDIO_EQDRC>; + clock-names = "gate", "srcpll", "eqdrc"; + /* + * 0:tdmout_a + * 1:tdmout_b + * 2:tdmout_c + * 3:spdifout + * 4:spdifout_b + */ + eqdrc_module = <1>; + /* max 0xf, each bit for one lane, usually one lane */ + lane_mask = <0x1>; + /* max 0xff, each bit for one channel */ + channel_mask = <0x3>; + status = "okay"; + }; +}; /* end of audiobus */ + +&earc { + status = "disabled"; +}; + +&pinctrl_periphs { + tdmout_a: tdmout_a { + mux { /* GPIOX_11, GPIOX_10, GPIOX_9 */ + groups = "tdm_a_sclk", + "tdm_a_fs", + "tdm_a_dout0"; + function = "tdm_a"; + }; + }; + + tdmin_a: tdmin_a { + mux { /* GPIOX_8 */ + groups = "tdm_a_din1"; + function = "tdm_a"; + }; + }; + + tdmb_mclk: tdmb_mclk { + mux { + groups = "mclk0_a"; + function = "mclk0"; + drive-strength = <2>; + }; + }; + tdmout_b: tdmout_b { + mux { /* GPIOA_1, GPIOA_2, GPIOA_3 */ + groups = "tdm_b_sclk", + "tdm_b_fs", + "tdm_b_dout0"; + function = "tdm_b"; + drive-strength = <2>; + }; + }; + + tdmin_b:tdmin_b { + mux { /* GPIOA_4 */ + groups = "tdm_b_din1" + /*,"tdmb_slv_sclk", "tdmb_slv_fs"*/; + function = "tdm_b"; + drive-strength = <2>; + }; + }; + + tdmc_mclk: tdmc_mclk { + mux { /* GPIOA_11 */ + groups = "mclk1_a"; + function = "mclk1"; + }; + }; + + tdmout_c:tdmout_c { + mux { /* GPIOA_12, GPIOA_13 */ + groups = "tdm_c_sclk_a", + "tdm_c_fs_a" + /*, "tdm_c_dout0_a" + *, "tdm_c_dout2" + *, "tdm_c_dout3" + */; + function = "tdm_c"; + }; + }; + + tdmin_c:tdmin_c { + mux { /* GPIOA_10 */ + groups = "tdm_c_din0_a"; + function = "tdm_c"; + }; + }; + + spdifin: spdifin { + mux {/* GPIOH_5 */ + groups = "spdif_in_h"; + function = "spdif_in"; + }; + }; + + pdmin: pdmin { + mux { /* GPIOA_5, GPIOA_6, GPIOA_8, GPIOA_9, GPIOA_7 */ + groups = "pdm_din0_a", + "pdm_din1_a", + "pdm_din2_a", + /*"pdm_din3_a",*/ + "pdm_dclk_a"; + function = "pdm"; + }; + }; + + clk12_24_z_pins:clk12_24_z_pins { + mux { + groups = "clk12_24_z"; + function = "clk12_24_ee"; + drive-strength = <3>; + }; + }; + + gen_clk_ee_z: gen_clk_ee_z { + mux { + groups="gen_clk_ee_z"; + function="gen_clk_ee"; + drive-strength = <3>; + }; + }; + + cam_dvp_pins:cam_dvp_pins { + mux { + groups = "bt656_a_vs", "bt656_a_hs", "bt656_a_clk", + "bt656_a_din0", "bt656_a_din1", "bt656_a_din2", + "bt656_a_din3", "bt656_a_din4", "bt656_a_din5", + "bt656_a_din6", "bt656_a_din7"; + function = "bt656"; + }; + }; +}; /* end of pinctrl_periphs */ + +&pinctrl_aobus { + spdifout: spdifout { + mux { /* GPIOAO_10 */ + groups = "spdif_ao_out"; + function = "spdif_ao_out"; + }; + }; +}; /* end of pinctrl_aobus */ + +&audio_data { + status = "okay"; +}; + +/* Audio Related End */ + +&pwm_ef { + status = "okay"; +}; + +&dwc2_a { + status = "okay"; + /** 0: normal, 1: otg+dwc3 host only, 2: otg+dwc3 device only*/ + controller-type = <3>; +}; + +&dwc3 { + status = "okay"; +}; + +&usb2_phy_v2 { + status = "okay"; + portnum = <2>; +}; + +&usb3_phy_v2 { + status = "okay"; + portnum = <1>; + otg = <1>; + gpio-vbus-power = "GPIOH_6"; + gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; +}; + +ðmac { + status = "okay"; + phy-handle = <&internal_ephy>; + phy-mode = "rmii"; +}; + +&uart_A { + status = "okay"; + uart_for_bt = <1>; +}; + +/*if you want to use vdin just modify status to "okay"*/ +&vdin0 { + memory-region = <&vdin0_cma_reserved>; + status = "okay"; + /* up to 1920x1080 yuv422 8bit and 5 buffers + * 1920x1080x2x5 = 20 M + */ + cma_size = <20>; + /*vdin write mem color depth support: + *bit0:support 8bit + *bit1:support 9bit + *bit2:support 10bit + *bit3:support 12bit + *bit4:support yuv422 10bit full pack mode (from txl new add) + */ + tv_bit_mode = <0x1>; +}; + +&vdin1 { + memory-region = <&vdin1_cma_reserved>; + status = "okay"; + /*vdin write mem color depth support: + *bit0:support 8bit + *bit1:support 9bit + *bit2:support 10bit + *bit3:support 12bit + */ + tv_bit_mode = <1>; +}; + +&sd_emmc_c { + status = "okay"; + pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>; + pinctrl-1 = <&emmc_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <200000000>; + non-removable; + disable-wp; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + //mmc-pwrseq = <&emmc_pwrseq>; + //vmmc-supply = <&vcc_3v3>; + //vqmmc-supply = <&vddio_boot>; +}; + +&sd_emmc_b { + //vmmc-supply = <&vddao3v3_reg>; + //vqmmc-supply = <&vddio_c>; + status = "okay"; + pinctrl-0 = <&sdcard_pins>; + pinctrl-1 = <&sdcard_clk_gate_pins>; + pinctrl-2 = <&sd_1bit_pins>; + //pinctrl-3 = <&sd_to_ao_uart_clr_pins + // &sdcard_pins &ao_to_sd_uart_pins>; + //pinctrl-4 = <&sd_to_ao_uart_clr_pins + // &sd_1bit_pins &ao_to_sd_uart_pins>; + //pinctrl-5 = <&sdcard_pins &ao_uart_pins>; + //pinctrl-6 = <&sd_to_ao_uart_clr_pins + // &ao_to_sd_uart_pins>; + //pinctrl-7 = <&sdcard_pins &ao_uart_pins>; + //pinctrl-8 = <&sd_to_ao_uart_clr_pins + // &ao_to_sd_uart_pins>; + + pinctrl-names = "sd_default", + "clk-gate", + "sd_1bit_pins"; + // "sd_clk_cmd_uart_pins", + // "sd_1bit_uart_pins", + // "sd_to_ao_uart_pins", + // "ao_to_sd_uart_pins", + // "sd_to_ao_jtag_pins", + // "ao_to_sd_jtag_pins"; + bus-width = <4>; + cap-sd-highspeed; + //sd-uhs-sdr12; + //sd-uhs-sdr25; + //sd-uhs-sdr50; + //sd-uhs-sdr104; + max-frequency = <200000000>; + disable-wp; + dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; + //vmmc-supply = <&vddao_3v3>; + //vqmmc-supply = <&emmc_1v8>; +}; + +&sd_emmc_a { + status = "okay"; + pinctrl-0 = <&sdio_m_pins>; + pinctrl-1 = <&sdio_m_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr104; + non-removable; + max-frequency = <200000000>; + disable-wp; + cap-sdio-irq; + keep-power-in-suspend; + //broken-cd; +}; + +&mtd_nand { + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + pinctrl-names = "nand_norb_mod","nand_cs_only"; + pinctrl-0 = <&all_nand_pins>; + pinctrl-1 = <&nand_cs_pins>; + bl_mode = <1>; + fip_copies = <4>; + fip_size = <0x200000>; + ship_bad_block = <1>; + disa_irq_flag = <1>; + nand@bootloader { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-ecc-maximize; + partition@0 { + label = "bootloader"; + reg = <0x0 0x00000000>; + }; + }; + + nand@normal { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + nand-ecc-maximize; + + partition@0 { + label = "tpl"; + reg = <0x0 0x00000000>; + }; + partition@1 { + label = "logo"; + reg = <0x0 0x00200000>; + }; + partition@2 { + label = "recovery"; + reg = <0x0 0x1000000>; + }; + partition@3 { + label = "boot"; + reg = <0x0 0x0F00000>; + }; + partition@4 { + label = "system"; + reg = <0x0 0x11800000>; + }; + partition@5 { + label = "data"; + reg = <0x0 0xffffffff>; + }; + }; +}; + +&pcie_A { + reset-gpio = <&gpio GPIOX_7 GPIO_ACTIVE_HIGH>; + status = "disable"; +}; + +&saradc { + status = "okay"; +}; + +&spicc0 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&spicc0_pins_x>; + cs-gpios = <&gpio GPIOX_10 GPIO_ACTIVE_HIGH>; +}; + +&spicc1 { + status = "disabled"; + pinctrl-names = "default"; + pinctrl-0 = <&spicc1_pins>; + cs-gpios = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; +}; + +&ir { + status = "okay"; + pinctrl-0 = <&remote_pins>; + pinctrl-names = "default"; +}; + +&vddcpu0 { + status = "okay"; +}; + +&pinctrl_audio { + tdm_b_clk_pins: tdm_b_clk_pins { + mux { + groups = "tdm_sclk1", "tdm_lrclk1"; + function = "tdm_clk_outb"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_linux.dts b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_linux.dts index cf829e197..96585098a 100644 --- a/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_linux.dts +++ b/arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200_linux.dts @@ -1915,9 +1915,9 @@ max-frequency = <200000000>; non-removable; disable-wp; - //mmc-ddr-1_8v; - //mmc-hs200-1_8v; - //mmc-hs400-1_8v; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; //mmc-pwrseq = <&emmc_pwrseq>; //vmmc-supply = <&vcc_3v3>; //vqmmc-supply = <&vddio_boot>; @@ -1942,41 +1942,41 @@ // &ao_to_sd_uart_pins>; pinctrl-names = "sd_default", - "clk-gate", - "sd_1bit_pins"; - // "sd_clk_cmd_uart_pins", - // "sd_1bit_uart_pins", - // "sd_to_ao_uart_pins", - // "ao_to_sd_uart_pins", - // "sd_to_ao_jtag_pins", - // "ao_to_sd_jtag_pins"; - bus-width = <4>; - cap-sd-highspeed; -// sd-uhs-sdr12; -// sd-uhs-sdr25; -// sd-uhs-sdr50; -// sd-uhs-sdr104; - max-frequency = <200000000>; - disable-wp; - dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; - cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; - //vmmc-supply = <&vddao_3v3>; - //vqmmc-supply = <&emmc_1v8>; + "clk-gate", + "sd_1bit_pins"; + // "sd_clk_cmd_uart_pins", + // "sd_1bit_uart_pins", + // "sd_to_ao_uart_pins", + // "ao_to_sd_uart_pins", + // "sd_to_ao_jtag_pins", + // "ao_to_sd_jtag_pins"; + bus-width = <4>; + cap-sd-highspeed; + //sd-uhs-sdr12; + //sd-uhs-sdr25; + //sd-uhs-sdr50; + //sd-uhs-sdr104; + max-frequency = <200000000>; + disable-wp; + dat1-gpios = <&gpio GPIOC_1 GPIO_ACTIVE_HIGH>; + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_HIGH>; + //vmmc-supply = <&vddao_3v3>; + //vqmmc-supply = <&emmc_1v8>; }; &sd_emmc_a { - status = "okay"; - pinctrl-0 = <&sdio_m_pins>; - pinctrl-1 = <&sdio_m_clk_gate_pins>; - pinctrl-names = "default", "clk-gate"; - bus-width = <4>; - cap-sd-highspeed; - sd-uhs-sdr104; - non-removable; - max-frequency = <200000000>; - disable-wp; - cap-sdio-irq; - keep-power-in-suspend; + status = "okay"; + pinctrl-0 = <&sdio_m_pins>; + pinctrl-1 = <&sdio_m_clk_gate_pins>; + pinctrl-names = "default", "clk-gate"; + bus-width = <4>; + cap-sd-highspeed; + sd-uhs-sdr104; + non-removable; + max-frequency = <200000000>; + disable-wp; + cap-sdio-irq; + keep-power-in-suspend; //broken-cd; }; diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 39e6d11ad..ce9909226 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -41,10 +41,6 @@ #include "mmc_key.h" #include "mmc_dtb.h" #include -//KV_TODO: modify -#if CONFIG_AMLOGIC_KERNEL_VERSION == 13515 -#include -#endif #include #include @@ -68,23 +64,6 @@ struct wifi_clk_table wifi_clk[WIFI_CLOCK_TABLE_MAX] = { struct mmc_host *sdio_host; static char *caps2_quirks = "none"; -//#if CONFIG_AMLOGIC_KERNEL_VERSION == 13515 -//void mmc_sd_update_cmdline_timing(void *data, struct mmc_card *card, int *err) -//{ -// /* nothing */ -// *err = 0; -//} -// -//void mmc_sd_update_dataline_timing(void *data, struct mmc_card *card, int *err) -//{ -// /* nothing */ -// *err = 0; -//} -// -//#define SD_CMD_TIMING mmc_sd_update_cmdline_timing -//#define SD_DATA_TIMING mmc_sd_update_dataline_timing -//#endif - static inline u32 aml_mv_dly1_nommc(u32 x) { return (x) | ((x) << 6) | ((x) << 12) | ((x) << 18); @@ -4081,23 +4060,6 @@ static int meson_mmc_probe(struct platform_device *pdev) schedule_delayed_work(&host->dtbkey, 50); } -#if CONFIG_AMLOGIC_KERNEL_VERSION == 13515 -#ifdef CONFIG_ANDROID_VENDOR_HOOKS - if (aml_card_type_non_sdio(host)) { - ret = - register_trace_android_vh_mmc_sd_update_cmdline_timing(SD_CMD_TIMING, - NULL); - if (ret) - pr_err("register update_cmdline_timing failed, err:%d\n", ret); - ret = - register_trace_android_vh_mmc_sd_update_dataline_timing(SD_DATA_TIMING, - NULL); - if (ret) - pr_err("register update_dataline timing failed, err:%d\n", ret); - } -#endif -#endif - #if IS_ENABLED(CONFIG_DEBUG_FS) if (mmc->debugfs_root && aml_card_type_mmc(host)) { host->debugfs_root = debugfs_create_dir(dev_name(&pdev->dev), mmc->debugfs_root);