From bfa2c539dfbae8e83a2fb366c4f3d35326fba609 Mon Sep 17 00:00:00 2001 From: Wenjie Qiao Date: Sun, 8 Oct 2023 12:16:22 +0800 Subject: [PATCH] hdmitx: sm1 boot panic [1/1] PD#SWPL-141867 Problem: sm1 boot panic Solution: Chips before SC2 do not allow access to P_CLKCTRL_HDCP22_CLK_CTRL Verify: sm1 Test: DRM-TX-17 Change-Id: I493e67c02da56ab38064aafec3f8277447561d78 Signed-off-by: Wenjie Qiao --- drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c b/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c index 265fcf845..366ee85cd 100644 --- a/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c +++ b/drivers/media/vout/hdmitx20/hw/hdmi_tx_hw.c @@ -5709,7 +5709,10 @@ static int hdmitx_cntl_misc(struct hdmitx_hw_common *tx_hw, unsigned int cmd, break; case MISC_ESMCLK_CTRL: hdmitx_set_reg_bits(HDMITX_TOP_CLK_CNTL, !!argv, 6, 1); - hd_set_reg_bits(P_CLKCTRL_HDCP22_CLK_CTRL, !!argv, 8, 1); + if (hdev->tx_hw.chip_data->chip_type >= MESON_CPU_ID_SC2) + hd_set_reg_bits(P_CLKCTRL_HDCP22_CLK_CTRL, !!argv, 8, 1); + else + hd_set_reg_bits(P_HHI_HDCP22_CLK_CNTL, !!argv, 8, 1); break; case MISC_AUDIO_PREPARE: hdmitx_set_reg_bits(HDMITX_DWC_AUD_CONF0, 0, 0, 4);