From dba0746cf2f96089de3fb0b331eaf35e0e349628 Mon Sep 17 00:00:00 2001 From: "qiang.liu" Date: Tue, 5 Sep 2023 13:18:33 +0800 Subject: [PATCH] tvafe: change avin detected config [1/1] PD#SWPL-138917 Problem: avin detected config need optimize Solution: change avin detected config Verify: txhd2 Change-Id: I7548bf0ca33df5d11d7096d0c7f02285317d4798 Signed-off-by: qiang.liu --- .../media/vin/tvin/tvafe/tvafe_avin_detect.c | 63 +++++++++++-------- .../media/vin/tvin/tvafe/tvafe_avin_detect.h | 1 + drivers/media/vin/tvin/tvafe/tvafe_cvd.c | 4 +- drivers/media/vin/tvin/vdin/vdin_ctl.c | 4 +- 4 files changed, 43 insertions(+), 29 deletions(-) diff --git a/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.c b/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.c index 526669038..056ff9f47 100644 --- a/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.c +++ b/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.c @@ -72,8 +72,6 @@ static unsigned int trigger_sel = 1; static unsigned int irq_edge_en = 1; -static unsigned int irq_filter; - static unsigned int irq_pol; static unsigned int avin_count_times = 5; @@ -497,7 +495,7 @@ static void tvafe_avin_detect_anlog_config(void) W_HIU_BIT(meson_data->detect_cntl, 1, AFE_T5_CH2_EN_DC_BIAS_BIT, AFE_T5_CH2_EN_DC_BIAS_WIDTH); - W_HIU_BIT(HHI_CVBS_DETECT_CNTL, meson_data->vdc_level, + W_HIU_BIT(meson_data->detect_cntl, meson_data->vdc_level, AFE_DETECT_RSV_BIT, AFE_DETECT_RSV_WIDTH); } else { /*ch config*/ @@ -556,27 +554,37 @@ static void tvafe_avin_detect_anlog_config(void) static void tvafe_avin_detect_digital_config(void) { - if (!meson_data) { - tvafe_pr_info("%s: meson_data is null\n", __func__); + int i; + unsigned int device_mask; + unsigned int irq_cntl; + + if (!meson_data || !av_dev) { + tvafe_pr_info("%s: meson_data or av_dev is null\n", __func__); return; } - tvafe_avin_irq_update_bit(meson_data->irq0_cntl, - CVBS_IRQ_MODE_MASK << CVBS_IRQ_MODE_BIT, - irq_mode << CVBS_IRQ_MODE_BIT); + device_mask = av_dev->dts_param.device_mask; + irq_cntl = meson_data->irq0_cntl; + for (i = 0; i < TVAFE_MAX_AVIN_DEVICE_NUM && (device_mask & BIT(0)); i++) { + tvafe_avin_irq_update_bit(irq_cntl, + CVBS_IRQ_MODE_MASK << CVBS_IRQ_MODE_BIT, + irq_mode << CVBS_IRQ_MODE_BIT); + tvafe_avin_irq_update_bit(irq_cntl, + CVBS_IRQ_TRIGGER_SEL_MASK << CVBS_IRQ_TRIGGER_SEL_BIT, + trigger_sel << CVBS_IRQ_TRIGGER_SEL_BIT); + tvafe_avin_irq_update_bit(irq_cntl, + CVBS_IRQ_EDGE_EN_MASK << CVBS_IRQ_EDGE_EN_BIT, + irq_edge_en << CVBS_IRQ_EDGE_EN_BIT); + tvafe_avin_irq_update_bit(irq_cntl, + CVBS_IRQ_FILTER_MASK << CVBS_IRQ_FILTER_BIT, + meson_data->irq_filter << CVBS_IRQ_FILTER_BIT); + tvafe_avin_irq_update_bit(irq_cntl, + CVBS_IRQ_POL_MASK << CVBS_IRQ_POL_BIT, + irq_pol << CVBS_IRQ_POL_BIT); - tvafe_avin_irq_update_bit(meson_data->irq0_cntl, - CVBS_IRQ_TRIGGER_SEL_MASK << CVBS_IRQ_TRIGGER_SEL_BIT, - trigger_sel << CVBS_IRQ_TRIGGER_SEL_BIT); - tvafe_avin_irq_update_bit(meson_data->irq0_cntl, - CVBS_IRQ_EDGE_EN_MASK << CVBS_IRQ_EDGE_EN_BIT, - irq_edge_en << CVBS_IRQ_EDGE_EN_BIT); - tvafe_avin_irq_update_bit(meson_data->irq0_cntl, - CVBS_IRQ_FILTER_MASK << CVBS_IRQ_FILTER_BIT, - irq_filter << CVBS_IRQ_FILTER_BIT); - tvafe_avin_irq_update_bit(meson_data->irq0_cntl, - CVBS_IRQ_POL_MASK << CVBS_IRQ_POL_BIT, - irq_pol << CVBS_IRQ_POL_BIT); + device_mask >>= 1; + irq_cntl = meson_data->irq1_cntl; + } } static int tvafe_avin_open(struct inode *inode, struct file *file) @@ -714,7 +722,7 @@ static void tvafe_avin_detect_state(struct tvafe_avin_det_s *av_dev) tvafe_pr_info("irq_mode: %d\n", irq_mode); tvafe_pr_info("trigger_sel: %d\n", trigger_sel); tvafe_pr_info("irq_edge_en: %d\n", irq_edge_en); - tvafe_pr_info("irq_filter: %d\n", irq_filter); + tvafe_pr_info("irq_filter: %d\n", meson_data->irq_filter); tvafe_pr_info("irq_pol: %d\n", irq_pol); } @@ -908,14 +916,14 @@ static ssize_t debug_store(struct device *dev, __func__, irq_edge_en); } else if (!strcmp(parm[0], "irq_filter")) { if (parm[1]) { - if (kstrtouint(parm[1], 10, &irq_filter)) { + if (kstrtouint(parm[1], 10, &meson_data->irq_filter)) { tvafe_pr_info("[%s]:invalid parameter\n", __func__); goto tvafe_avin_detect_store_err; } } tvafe_pr_info("[%s]: irq_filter: %d\n", - __func__, irq_filter); + __func__, meson_data->irq_filter); } else if (!strcmp(parm[0], "irq_pol")) { if (parm[1]) { if (kstrtouint(parm[1], 10, &irq_pol)) { @@ -1034,7 +1042,7 @@ static void tvafe_avin_detect_timer_handler(struct timer_list *avin_detect_timer goto TIMER; } } else if (av_dev->dts_param.device_mask == TVAFE_AVIN_CH2_MASK) { - av_dev->irq_counter[0] = aml_read_cbus(meson_data->irq1_cnt); + av_dev->irq_counter[0] = tvafe_avin_irq_reg_read(meson_data->irq1_cnt); if (meson_data) { if (!R_HIU_BIT(meson_data->detect_cntl, AFE_TL_CH2_EN_DETECT_BIT, AFE_TL_CH2_EN_DETECT_WIDTH)) @@ -1045,8 +1053,8 @@ static void tvafe_avin_detect_timer_handler(struct timer_list *avin_detect_timer goto TIMER; } } else if (av_dev->dts_param.device_mask == TVAFE_AVIN_MASK) { - av_dev->irq_counter[0] = aml_read_cbus(meson_data->irq0_cnt); - av_dev->irq_counter[1] = aml_read_cbus(meson_data->irq1_cnt); + av_dev->irq_counter[0] = tvafe_avin_irq_reg_read(meson_data->irq0_cnt); + av_dev->irq_counter[1] = tvafe_avin_irq_reg_read(meson_data->irq1_cnt); if (meson_data) { if (!R_HIU_BIT(meson_data->detect_cntl, AFE_CH1_EN_DETECT_BIT, AFE_CH1_EN_DETECT_WIDTH) || @@ -1449,9 +1457,10 @@ struct meson_avin_data txhd2_data = { .irq1_cntl = CVBS_IRQ1_CNTL, .irq0_cnt = CVBS_IRQ0_COUNTER, .irq1_cnt = CVBS_IRQ1_COUNTER, - .dc_level_adj = 3, + .dc_level_adj = 2, .vdc_level = 3, .comp_level_adj = 3, + .irq_filter = 1, }; static const struct of_device_id tvafe_avin_dt_match[] = { diff --git a/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.h b/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.h index baa241221..2e77ef14a 100644 --- a/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.h +++ b/drivers/media/vin/tvin/tvafe/tvafe_avin_detect.h @@ -167,6 +167,7 @@ struct meson_avin_data { unsigned int vdc_level; /*0:635mv; 1:686mv; 2:733mv; 3:776mv; 4:816mv; 5:853mv; 6:887mv; 7:919mv*/ unsigned int comp_level_adj; + unsigned int irq_filter; }; void tvafe_cha1_SYNCTIP_close_config(void); diff --git a/drivers/media/vin/tvin/tvafe/tvafe_cvd.c b/drivers/media/vin/tvin/tvafe/tvafe_cvd.c index 5909f6366..f76e11f00 100644 --- a/drivers/media/vin/tvin/tvafe/tvafe_cvd.c +++ b/drivers/media/vin/tvin/tvafe/tvafe_cvd.c @@ -837,8 +837,10 @@ static void tvafe_cvd2_info_init(struct tvafe_cvd2_s *cvd2) inline void tvafe_cvd2_try_format(struct tvafe_cvd2_s *cvd2, struct tvafe_cvd2_mem_s *mem, enum tvin_sig_fmt_e fmt) { - if (always_try_format) + if (always_try_format) { fmt = always_try_format; + cvd2->manual_fmt = always_try_format; + } /* check format validation */ if (fmt < TVIN_SIG_FMT_CVBS_NTSC_M || diff --git a/drivers/media/vin/tvin/vdin/vdin_ctl.c b/drivers/media/vin/tvin/vdin/vdin_ctl.c index 930e130fa..d7a4f225e 100644 --- a/drivers/media/vin/tvin/vdin/vdin_ctl.c +++ b/drivers/media/vin/tvin/vdin/vdin_ctl.c @@ -4249,8 +4249,10 @@ bool vdin_check_cycle(struct vdin_dev_s *devp) /* TODO:whether T5/TL1/TXHD2/T3X support cycle check */ if (!(is_meson_t7_cpu() || is_meson_t3_cpu() || is_meson_t5w_cpu() || is_meson_t5m_cpu()) && - interval_value > VDIN_INPUT_MAX_FPS) + interval_value > VDIN_INPUT_MAX_FPS) { + devp->stats.cycle_err_cnt_con = 0; return false; + } /* if continuous cycle error over 10 times,call hdmi_clr_vsync to recovery */ if (devp->frontend)