diff --git a/arch/arm/boot/dts/amlogic/meson-s7d.dtsi b/arch/arm/boot/dts/amlogic/meson-s7d.dtsi index a2c68ada3..8a257058a 100644 --- a/arch/arm/boot/dts/amlogic/meson-s7d.dtsi +++ b/arch/arm/boot/dts/amlogic/meson-s7d.dtsi @@ -336,6 +336,19 @@ amlogic,clock-frequency = <3000000>; amlogic,test-channel = <7>; amlogic,fifo-data-width = <16>; + /* Filter control */ + amlogic,reg7-init = <0x00000c11>; + amlogic,reg8-init = <0x0280614d>; + /* Delay configure */ + amlogic,reg3-init = <0x10a02403>; + amlogic,reg4-init = <0x00000080>; + amlogic,reg5-init = <0x0010340b>; + /* Control */ + amlogic,reg6-init = <0x00000031>; + /* Set aux and extern vref */ + amlogic,reg9-init = <0x0000e4e4>; + amlogic,reg10-init = <0x74543414>; + amlogic,reg11-init = <0xf4d4b494>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-s7d.dtsi b/arch/arm64/boot/dts/amlogic/meson-s7d.dtsi index 117da0fbf..56226d971 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s7d.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s7d.dtsi @@ -336,6 +336,19 @@ amlogic,clock-frequency = <3000000>; amlogic,test-channel = <7>; amlogic,fifo-data-width = <16>; + /* Filter control */ + amlogic,reg7-init = <0x00000c11>; + amlogic,reg8-init = <0x0280614d>; + /* Delay configure */ + amlogic,reg3-init = <0x10a02403>; + amlogic,reg4-init = <0x00000080>; + amlogic,reg5-init = <0x0010340b>; + /* Control */ + amlogic,reg6-init = <0x00000031>; + /* Set aux and extern vref */ + amlogic,reg9-init = <0x0000e4e4>; + amlogic,reg10-init = <0x74543414>; + amlogic,reg11-init = <0xf4d4b494>; status = "disabled"; }; diff --git a/drivers/iio/adc/amlogic_saradc.c b/drivers/iio/adc/amlogic_saradc.c index 877565fc8..4edf860ad 100644 --- a/drivers/iio/adc/amlogic_saradc.c +++ b/drivers/iio/adc/amlogic_saradc.c @@ -369,6 +369,10 @@ static int amlogic_saradc_self_calib(struct iio_dev *indio_dev) static int amlogic_saradc_init(struct iio_dev *indio_dev) { struct amlogic_saradc_priv *priv = iio_priv(indio_dev); + struct device_node *np = indio_dev->dev.parent->of_node; + char buf[32]; + u32 reg_value; + int index; int ret; ret = clk_set_parent(priv->clk_mux, priv->clk_src); @@ -386,25 +390,26 @@ static int amlogic_saradc_init(struct iio_dev *indio_dev) usleep_range(5, 10); - /* Filter control */ - regmap_write(priv->regmap, SARADC_REG7, 0x00000c21); - regmap_write(priv->regmap, SARADC_REG8, 0x0280614d); - - /* Delay configure */ - regmap_write(priv->regmap, SARADC_REG3, 0x10a02403); - regmap_write(priv->regmap, SARADC_REG4, 0x00000080); - regmap_write(priv->regmap, SARADC_REG5, 0x0010340b); - - /* Control */ - regmap_write(priv->regmap, SARADC_REG6, 0x00000031); - - /* Set aux and extern vref */ - regmap_write(priv->regmap, SARADC_REG9, 0x0000e4e4); - regmap_write(priv->regmap, SARADC_REG10, 0x74543414); - regmap_write(priv->regmap, SARADC_REG11, 0xf4d4b494); + /* Load register configuration from DT [REG0 - REG14] */ + for (index = 0; index <= 14; index++) { + /* Generate attribute names */ + snprintf(buf, sizeof(buf), "amlogic,reg%d-init", index); + /* If it exists, configure it to the register */ + ret = of_property_read_u32(np, buf, ®_value); + if (!ret) + regmap_write(priv->regmap, index << 2, reg_value); + } /* ADC is disabled by default */ - regmap_write(priv->regmap, SARADC_REG0, 0x00400000); + regmap_update_bits(priv->regmap, SARADC_REG0, + SARADC_REG0_FIFO_IRQ_EN, 0); + regmap_update_bits(priv->regmap, SARADC_REG0, + SARADC_REG0_SAMPLING_STOP, + SARADC_REG0_SAMPLING_STOP); + regmap_update_bits(priv->regmap, SARADC_REG0, + SARADC_REG0_SAMPLING_ENABLE, 0); + regmap_update_bits(priv->regmap, SARADC_REG0, + SARADC_REG0_ADC_EN, 0); return 0; }