Commit Graph

298 Commits

Author SHA1 Message Date
congyang.huang 45acc4038d drm: support drm and vout for t6d [1/1]
PD#SWPL-167815

Problem:
need support t6d drm and vout

Solution:
enable drm and vout

Verify:
t6d

Test:
DRM-OSD-11

Change-Id: If5bdd54f923184eac4efe505d75639516d2dac7b
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-08-22 14:27:52 +08:00
gerrit autosubmit a8f3c5ce7b Merge "hdmitx: add edid_valid property [1/1]" into amlogic-5.15-dev 2024-08-21 21:24:07 -07:00
mingyang.he 87e239dabe drm: adjust print level for seamless [1/1]
PD#SWPL-182261

Problem:
output log continuously while the video is playing

Solution:
adjust print level

Verify:
s7d

Test:
DRM-OSD-44

Change-Id: I9c90096be174c026285a727f9e2dce327fc3b225
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-08-20 05:45:09 -07:00
zhou.han 659a8d1dc2 hdmitx: add edid_valid property [1/1]
PD#SWPL-99060

Problem:
Try to limit the external module directly r/w  the driver node.

Solution:
Add edid_valid property

Verify:
ohm

Test:
DRM-TX-20

Change-Id: I3bc300e0a8c0ec019d2ef10db976584140de4588
Signed-off-by: zhou.han <zhou.han@amlogic.com>
2024-08-19 22:49:10 -07:00
congyang.huang b002eb0c89 drm: set the initial state of brr to disabled in duplicate_state [1/1]
PD#SWPL-173046

Problem:
when switching from nonloopback to loopback, the connector
corresponding to crtc changes, but HWC still sets vrr_enable
to true. The previous field's brr_mode、brr、prev_vrefresh same
as the new filed, causing enable lcd failed

Solution:
not enable brr variables in duplicate_state,the brr is cal
in encoder_check

Verify:
s5 t5m

Test:
DRM-OSD-45
DRM-OSD-47

Change-Id: I7e7b2eeadc7714c37596f15ee2b34bc8f9dd7e06
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-08-15 04:01:02 -07:00
congyang.huang 64d2722e6f drm: optimize qms_brr_viclist function [1/1]
PD#SWPL-178271

Problem:
optimize qms brr viclist

Solution:
optimize get_modes function
vrr range equals hdmitx and lcd group freq divided by 100

Verify:
s5 t5m

Test:
DRM-OSD-45
DRM-OSD-47

Change-Id: I72d1a2588fb761f21b1b56039c1cb37d5b55ce60
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-08-15 04:00:48 -07:00
congyang.huang b451185a22 drm: move seamless_change from crtc_disable to encoder_check [1/1]
PD#SWPL-178554

Problem:
optimize seamless_change flow

Solution:
move seamless_change from crtc_disable to encoder_check

Verify:
s5 t5m

Test:
DRM-OSD-45
DRM-OSD-47

Change-Id: Ib754a4c6a54af9ba2a9cfae9d32b8116b0c76cf1
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-08-15 04:00:39 -07:00
gerrit autosubmit 403b3be0a9 Merge "drm: reset fb size for fbdev alloc fb [1/1]" into amlogic-5.15-dev 2024-08-14 18:46:57 -07:00
mingyang.he 19c7c10fc8 drm: reset fb size for fbdev alloc fb [1/1]
PD#SWPL-171535

Problem:
release the memory of fb1 results in memory fragmentation

Solution:
alloc fb1 memory based on AFBC-size and 4KB alignment

Verify:
s6 s7 s7d

Test:
DRM-OSD-2

Change-Id: I8ba5c1fef60c15d1473b65f13eee0ac8ee7f06f9
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-08-14 15:41:21 +08:00
mingyang.he 714f4ef9ee drm: fix memory leak caused by video fence [1/1]
PD#SWPL-180405

Problem:
didn't decrement fence reference count after dma_resv_get_excl_unlocked

Solution:
put video fence once more

Verify:
s6

Test:
DRM-OSD-28

Change-Id: I28ad558abf19980e6d7c631720c44496d3f5d611
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-08-13 01:47:14 -07:00
wenlong.zhang ea8d8b334e drm: move global alpha setting to osdblend [1/1]
PD#SWPL-181209

Problem:
dummy alpha have dummy bit in bit10~9, so the read value will be
shift and it is not equal to real value. rdma will fill the write
value according to read value when rdma_write_reg_bits be used for
write register.

Solution:
move global alpha setting to osdblend and write the register
at one time.

Verify:
s7d

Test:
DRM-OSD-77

Change-Id: I272633fd940baabaee81ec5b6a3c0f25c1354850
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-08-11 21:40:33 -07:00
wenlong.zhang fae9594f11 drm: init osd register for suspend&resume [1/1]
PD#SWPL-177148

Problem:
for save power consumption, suspend will turn off vpu power,
register will br reset.

Solution:
we need to do block register init again

Verify:
S7

Test:
DRM-OSD-75

Change-Id: Ia2e0a8e6404f624cc41f3aacffbce558179fcb70
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-08-06 03:42:16 -07:00
yujun.zhang c57e2abb30 drm: reduce wait time to be 100ms in waiting dependencies [1/1]
PD#SWPL-176465

Problem:
10s for waiting dependencies in commit is too long.

Solution:
Use 100ms for waiting.

Verify:
s7d

Test:
DRM-TX-38

Change-Id: Ibc7c1e92eea0168421763a2b0acb90e5d4dce400
Signed-off-by: yujun.zhang <yujun.zhang@amlogic.com>
2024-08-02 03:52:47 -07:00
mingyang.he aa2621a960 drm: add node for resize video src & dst [1/1]
PD#SWPL-162724

Problem:
need nodes to resize video src and dst

Solution:
add nodes in sysfs

Verify:
sc2

Test:
DRM-OSD-73

Change-Id: I0fd226180f22b4222b425ce1e54f5da44dcaf90c
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-31 23:04:37 -07:00
mingyang.he bc241cab82 drm: fix coverity error 202406 [1/1]
PD#SWPL-168330

Problem:
coverity error

Solution:
fix two coverity issue
1. uninitialized pointer read
2. identical code for different branches

Verify:
t7

Test:
DRM-OSD-74

Change-Id: I5539015c6693b571a766b0b4e7183016a1462628
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-31 23:04:29 -07:00
yujun.zhang 80a89f774f drm: disable pipeline's blocks when no plane was committed [1/1]
PD#SWPL-121840

Problem:
uboot enable vpp osd1 src control register when plugout hdmitx cable.
drm driver did not do logo_init.
when change bootanimation to bootvideo, then the screen will show osd

Solution:
disable pipeline's blocks when no plane was committed

Verify:
ah212, S5, T7c

Test:
DRM-OSD-27

Change-Id: I366ff01fcfbae6229e593d2a835c97cab64269af
Signed-off-by: yujun.zhang <yujun.zhang@amlogic.com>
2024-07-31 03:55:51 -07:00
wenlong.zhang 2ac8435205 drm: fix ui flashing issue when hwc device/client switch [1/1]
PD#SWPL-179342

Problem:
s6 didn't set hdr policy

Solution:
set hdr policy in vpu data

Verify:
s6

Test:
DRM-OSD-57

Change-Id: Ic3d434663fa213586038b571817578b85edc0e3f
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-30 22:43:41 -07:00
wenlong.zhang f8806c14da drm: fix screen flash between UI&setting [1/1]
PD#SWPL-179053

Problem:
osdblend ctrl enable premult of dinx for reva

Solution:
osdblend ctrl should set unpremult for dinx
and premult for core0&core1

Verify:
s7d

Test:
DRM-OSD-74

Change-Id: I41527fe80291e43daf4b48f4431498a51d6df75c
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-07-30 00:41:49 -07:00
gerrit autosubmit 4cb92df63e Merge "drm: fix zapper config compile issue [1/1]" into amlogic-5.15-dev 2024-07-24 06:20:53 -07:00
Ao Xu 67af342a20 drm: optimize seamless switch between ALLM and QMS [1/1]
PD#SWPL-170739

Problem:
when change mode from ALLM to QMS and mode is same with brr, no need
to do mode change. when change mode from QMS to ALLM and QMS's mode is brr,
it also no need to do mode change.

Solution:
optimize seamless switch between ALLM and QMS

Verify:
s7d

Test:
DRM-OSD-5

Change-Id: Ic5fd113b0d8157ee02e9e33f00e5e85ba7ffcc6c
Signed-off-by: Ao Xu <ao.xu@amlogic.com>
2024-07-24 06:19:56 -07:00
Ao Xu 24c2802a7c drm: fix zapper config compile issue [1/1]
PD#SWPL-176824

Problem:
drm compile error for zapper config

Solution:
fix zapper config compile issue

Verify:
s1a

Test:
DRM-OSD-69

Change-Id: I8860644db017806e6a129ac7e72de6fb02d8a39c
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-24 16:59:53 +08:00
yao liu 5aa1da20fc drm: fix compile error without dv [1/1]
PD#SWPL-168062

Problem:
compile error without dv

Solution:
fix error

Verify:
s5

Test:
S5

Change-Id: I591f88834b511375aafa875cd97e894ee3cfe478
Signed-off-by: yao liu <yao.liu@amlogic.com>
2024-07-23 20:05:55 -07:00
yao zhang1 4ca2758d76 yocto: ott basic defconfig [2/2]
PD#SWPL-172535

Problem:
Disabled AMLOGIC_LCD causing drm module compilation error.

Solution:
Add config mask in drm module.

Verify:
s7,s4,s4d

Test:
DRM-OSD-22

Change-Id: I70d8924e4dd6e2c95d4ed6a307b4ec0c19d8a75c
Signed-off-by: yao zhang1 <yao.zhang1@amlogic.com>
2024-07-21 22:53:37 -07:00
wenlong.zhang 676fa8287d drm: fix gem export vfree crash [1/1]
PD#SWPL-178017

Problem:
sg table used kmalloc, but vfree was used to release it

Solution:
change to kfree api

Verify:
S7D

Test:
DRM-OSD-71

Change-Id: I69ecaceeb6a1077550db520bb0cd22daac35cd6e
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-07-19 21:43:17 -07:00
wenlong.zhang d30cc6178f drm: add rdma table for drm osd registers [1/1]
PD#SWPL-101847

Problem:
drm write registers to rdma table one by one, due to rdma table update
and rdma manager flush to real register are out of sync, so we want to
creat a fake table, the fake table will copy to rdma table after
pipeline register write done, and then config rdma vsync

Solution:
add rdma table for drm osd registers, and it can dynamic switching by
this node /sys/class/drm/card0/crtc0/rdma_table_switch.
echo 1 > /sys/class/drm/card0/crtc0/rdma_table_switch switch off
echo 0 > /sys/class/drm/card0/crtc0/rdma_table_switch switch on

Verify:
T3x s7 s5

Test:
DRM-OSD-33

Change-Id: I053daa7daaab672f8b1e9fc2c38a2d60552d6288
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-07-17 23:57:23 -07:00
yujun.zhang 6f8f0bf795 drm: fix reset of mif reg VIU_OSD2_CTRL_STAT [1/1]
PD#SWPL-168643

Problem:
osd_cfg_sync_en bit of mif reg VIU_OSD2_CTRL_STAT gets
reset to be 1 after resuming.

Solution:
set osd_cfg_sync_en bit to be 0 in each commit if 1.

Verify:
s7

Test:
DRM-OSD-70

Change-Id: I7d3885eab088a597c25b41e0ce4b4377482315ba
Signed-off-by: yujun.zhang <yujun.zhang@amlogic.com>
2024-07-16 03:55:32 -07:00
Yongjie Zhu 9b59be6d45 drm: fix drm release dmabuf issue [1/1]
PD#SH-16471

Problem:
panfrost gpu use drm to release dmabuf will
call kernel panic

Solution:
modify meson_gem_prime_get_sg_table()

Verify:
t7c+aml_debian

Test:
use panfrost gpu start kernel

Change-Id: I8e1d6c9e2e9c9928df808918ffe1b3268aed7d78
Signed-off-by: Yongjie Zhu <yongjie.zhu@amlogic.com>
2024-07-15 19:45:11 -07:00
yao liu 6bf8cf9fca amdv: blank screen when osd3 on/off [1/1]
PD#SWPL-168620

Problem:
when osd3 on/off, core2a and core2c reset, but lut
updated fail; drm enable osd3 is one vsync earlier
then dv core2c

Solution:
1.drm set core2c lut when osd3 off->on
2.add force_toggle_once debug

Verify:
s5

Test:
s5

Change-Id: I5fe2a7abd1f4b887da5f32a655a24418fee86b64
Signed-off-by: yao liu <yao.liu@amlogic.com>
2024-07-15 00:04:56 -07:00
mingyang.he 1b481720f9 drm: src and dst x/y/w/h node in sysfs [1/1]
PD#SWPL-162722

Problem:
need nodes to adjust src size and dst size for osd plane

Solution:
add src and dst x/y/w/h node in sysfs

Verify:
sc2 t3x t7

Test:
DRM-OSD-16

Change-Id: I68209f9c7629e4b2d9bfc4539068655de19a5c65
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-15 00:03:23 -07:00
mingyang.he 0ffa795a01 drm: reset gfcd parse method for s6 [1/1]
PD#SWPL-176690

Problem:
setting ui display tilt

Solution:
reset gfcd parse method to get gfcd policy for s6

Verify:
s6

Test:
DRM-OSD-15

Change-Id: I1e192e83970fbfa35fdb385621e966586ab1284b
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-11 00:45:52 -07:00
hang cheng deff0cc1d3 hdmitx: disable phy asap when set mode [1/1]
PD#SWPL-166103

Problem:
on TCL55V6E TV, when STB change from 4k60hz y420,10bit
to 4K24hz y444,10bit by NFR, the TV may not decrypt
signal well and trigger a HPD reset to STB to handshake
again with low probability, this will cause Netflix
exit play and show tvq-pb-101(5.2.12). The possible
reasons may be as below
1.if the interval between previous mode disable and
new mode enable is short, TV may not detect input
signal change clearly
2.if hdcp encryption changes from enable to disable,
while signal not disabled, this may confuse TV, even
later hdmitx signal is disabled, there's probability TV
detection state machine go wrong to HPD reset logic
to request source device re-handshake.

Solution:
when disable hdmitx output, disable phy asap along with
hdcp disable, so that TV can detect signal change better

Verify:
ohm

Test:
DRM-TX-37

Change-Id: I8b897bc1f909989a459b23cc408e8b32ab8cdc84
Signed-off-by: hang cheng <hang.cheng@amlogic.com>
2024-07-10 03:56:56 -07:00
linfang.zhao da372be01a drm: provide the property of getting hdcp topo info for mesondisplay [1/1]
PD#SWPL-174924

Problem:
currently apk get hdcp status from hdmitx driver directly,
and need to use unify interface of drm to get hdcp status.

Solution:
add the property of getting hdcp topo info

Verify:
S7D

Test:
DRM-OSD-69

Change-Id: I49943fc84533c621bfdc422d2164264c5da020a8
Signed-off-by: linfang.zhao <linfang.zhao@amlogic.com>
2024-07-09 02:05:45 -07:00
mingyang.he a82d8eb2e8 drm: s6 drm bringup for viu1 2 4k afbc source display [1/1]
PD#SWPL-174338

Problem:
display black when sent 4k afbc osd1&osd2

Solution:
reset osd1 and osd2 out addr

Verify:
s6

Test:
DRM-OSD-6

Change-Id: I2da0256e36dde43e705669b0f6e0b59650145111
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-05 10:44:48 +08:00
mingyang.he 7d6b41d3e6 drm: s6 drm silicon bringup [1/1]
PD#SWPL-173017

Problem:
s6 drm silicon bringup

Solution:
s6 drm silicon bringup

Verify:
s6

Test:
DRM-OSD-15

Change-Id: I02d10aa1088b57b276a1a496eb44524987c1e9d3
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-07-05 10:43:50 +08:00
wenlong.zhang 932921ed67 drm: add global alpha for gfcd [1/1]
PD#SWPL-166558

Problem:
global alpha function not effect in gfcd

Solution:
use osdblend dummy alpha to set global alpha

Verify:
S7D & s6

Test:
DRM-OSD-15

Change-Id: Ife2b66cb4a300b979483dbbc2528147efd594dcb
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-07-05 10:43:48 +08:00
wenlong.zhang 44f8a89b10 drm: global alpha solution [1/1]
PD#SWPL-171672

Problem:
global alpha solution

Solution:
global alpha solution

Verify:
S7D

Test:
DRM-OSD-15

Change-Id: Ife2b66cb4a300b979483dbbc2528147efd594dcb
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-07-04 01:00:37 -07:00
wenlong.zhang d7edb9e2b7 drm: solution for gfcd odd size display abnormal [1/1]
PD#SWPL-171666

Problem:
gfcd source odd width display abnormal

Solution:
1.add workround for odd width input;
2.add gfcd odd size and gfcd global alpha enum;
3.move the gfcd block forward because it is more sensitive to timing;
4.optimizing gfcd afbc switches;
5.add gfcd div alpha setting;

Verify:
s7d

Test:
DRM-OSD-15

Change-Id: I83fda11948abd49abe021830a5acdd2607776094
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-07-03 19:48:43 -07:00
congyang.huang 9bc6865144 drm: support qms_brr_viclist function [1/1]
PD#SWPL-161718

Problem:
drm need add qms brr viclist

Solution:
add brr viclist and return in get_modes
drm vrr freq equals group freq divided by 100

Verify:
t7c

Test:
DRM-OSD-5

Change-Id: I9a4d5d9fe553c53d560fad64f5a56f7eedce7734
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-07-01 02:01:37 -07:00
zongdong.jiao b97732af86 hdmitx21: add vrr range and vic lists [1/1]
PD#SWPL-170918
PD#SWPL-161717

Problem:
Sink may support only 4k120, but its QMS range may be from
24 to 120.
Or sink may support upto 4k60, but 1080p120hz.

Solution:
Add the qms/game vrr range and vic lists to DRM group
Don't clear the EDID when forced_edid is true
Skip BRR 120 check when QMS tfr_max is false

Verify:
s7d/ross

Test:
DRM-TX-75

Change-Id: Ia65fa38bf18ae7399c9c4178665f8a3f18a03a74
Signed-off-by: zongdong.jiao <zongdong.jiao@amlogic.com>
2024-07-01 02:01:32 -07:00
wenlong.zhang af8cb3c38a drm: fix screen flash [1/1]
PD#SWPL-170495

Problem:
when drm and fbdev post display in the same vsync, there is mismatched
between canvas index with osd hw that caused display abnormal.

Solution:
make sure canvas update according to real register

Verify:
S4

Test:
DRM-OSD-67

Change-Id: Ia2f209fa2ddf4d9270bae74f4609e81c6758153c
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-06-28 05:54:17 -07:00
Wenjie Qiao e0f9a0246d hdmitx: sync edid valid_mode check between uboot/kernel [2/2]
PD#SWPL-154107

Problem:
sync edid valid_mode check between uboot/kernel

Solution:
sync edid valid_mode check between uboot/kernel

Verify:
sc2/s5

Test:
DRM-TX-27, DRM-TX-29, DRM-TX-42, DRM-TX-44
DRM-TX-59, DRM-TX-70, DRM-TX-113

Change-Id: I2a708d55575e8d781380a34b397296589aa69d71
Signed-off-by: Wenjie Qiao <wenjie.qiao@amlogic.com>
2024-06-28 03:57:46 -07:00
wenlong.zhang 367cf02120 drm: support video rotate function [1/1]
PD#TV-94929

Problem:
support video rotate function

Solution:
support video rotate function

Verify:
t5w

Test:
DRM-OSD-68

Change-Id: Ibdbafd97ac8874f3df7bab01e52fe2d639e4f567
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-06-27 20:07:44 -07:00
Ao Xu e0c8f47751 drm: remove wait vblank warning messages print [1/1]
PD#SWPL-171726

Problem:
WARN api print so many messages, it will lead to system
high latency occasionally

Solution:
remove wait vblank warning messages print

Verify:
s7d

Test:
DRM-OSD-24, DRM-OSD-54

Change-Id: I03b22d692edf78dc116cd50f74f5a7d52ad398e0
Signed-off-by: Ao Xu <ao.xu@amlogic.com>
2024-06-27 03:35:45 -07:00
wenlong.zhang c1962ae367 drm: add scanline layout for afrc modifier [1/1]
PD#SWPL-174421

Problem:
afrc just support scanline layout, it must notify to
gpu explicitly.

Solution:
afrc just support scanline layout, it must notify to
gpu explicitly.

Verify:
s7d

Test:
DRM-OSD-66

Change-Id: I414b7658e97aba0cde67516b042e4948e8b89e85
Signed-off-by: wenlong.zhang <wenlong.zhang@amlogic.com>
2024-06-26 23:05:55 -07:00
linfang.zhao 505f140e27 drm: disable video plane is not using work queue [1/1]
PD#SWPL-168462

Problem:
Play AVC format video source, flash green screen when exiting playback

Solution:
disable video plane is not using work queue

Verify:
S7D

Test:
DRM-OSD-27
DRM-OSD-33

Change-Id: I1be41f2502d04b2f0701e54358a315c6d3c708bb
Signed-off-by: linfang.zhao <linfang.zhao@amlogic.com>
2024-06-25 23:10:00 -07:00
Ao Xu 4601a9fc50 drm: reorganize osd mif color related interface [1/1]
PD#SWPL-170861

Problem:
osd mif color related api need get cpu version.
osd mif color format has duplicated definition

Solution:
reorganize osd mif color realted interface

Verify:
s7d

Test:
DRM-OSD-2

Change-Id: I6fecf32c8295ac380a777b5e751d58fcce640338
Signed-off-by: Ao Xu <ao.xu@amlogic.com>
2024-06-19 23:56:48 -07:00
congyang.huang 4011b879cf drm: use the appropriate sequence_id to decide attr during set mode [1/1]
PD#SWPL-172323

Problem:
hdmi block screen while entering recovery

Solution:
use appropriate sequence_id to prevent the failure of
drm set mode during recovery mode

Verify:
s7

Test:
DRM-OSD-2

Change-Id: Ic2e50120abc4edbd25d8de34126f2d0b716e7584
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-06-13 01:47:25 -07:00
mingyang.he 01cc3bcfbe drm: flash screen before bootanimation [1/1]
PD#SWPL-170497

Problem:
handle8(vpp1) and handle9(vpp2) write same reg with different val

Solution:
set VPP_INTF_OSD3_CTRL in handle9(vpp2) only

Verify:
t3x

Test:
DRM-OSD-13

Change-Id: I0443e4fa05674f205c81c1a3ca70b843f715189c
Signed-off-by: mingyang.he <mingyang.he@amlogic.com>
2024-06-11 01:50:12 -07:00
congyang.huang a6d9be6753 drm: add protection for logo load [1/1]
PD#SWPL-172336

Problem:
drm logo init failed

Solution:
add protection for logo load

Verify:
ohm

Test:
DRM-OSD-2

Change-Id: I31c9f580d5a181e5bcb33a211d4b7bbd3a3d8864
Signed-off-by: congyang.huang <congyang.huang@amlogic.com>
2024-06-11 01:49:50 -07:00
Ao Xu a595b10594 drm: fix txhd2 vague issue [1/1]
PD#SWPL-168999

Problem:
small surface scale up 1.5, it show vague

Solution:
change scaler coef from COEFS_4POINT_TRIANGLE to COEFS_BICUBIC

Verify:
txhd2

Test:
DRM-OSD-8

Change-Id: I7f0ebdc01bb1f6329e9421bd9eafa8395fa14656
Signed-off-by: Ao Xu <ao.xu@amlogic.com>
2024-06-06 08:03:37 -07:00