mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
098108a06e
PD#SWPL-67677 Problem: modify the code to meet the checkpatch requirements Solution: 1. modify code style 2. export cpuinfo_get_chipid 3. print cpuinfo_chip_id Verify: s4d Change-Id: I23db8e3efaf1d634a88d2970c1f183b9fad21b22 Signed-off-by: wanwei.jiang <wanwei.jiang@amlogic.com>
66 lines
1.4 KiB
C
66 lines
1.4 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
|
|
/*
|
|
* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
|
|
*/
|
|
|
|
#ifndef __SOC_IO_H
|
|
#define __SOC_IO_H
|
|
|
|
#include <linux/amlogic/media/registers/register_map.h>
|
|
#include <linux/io.h>
|
|
|
|
/* vpp simple io */
|
|
static inline int aml_read_vcbus_s(unsigned int reg)
|
|
{
|
|
return readl((vpp_base + (reg << 2)));
|
|
}
|
|
|
|
static inline void aml_write_vcbus_s(unsigned int reg, unsigned int val)
|
|
{
|
|
writel(val, (vpp_base + (reg << 2)));
|
|
}
|
|
|
|
static inline void aml_vcbus_update_bits_s(unsigned int reg,
|
|
unsigned int value,
|
|
unsigned int start,
|
|
unsigned int len)
|
|
{
|
|
unsigned int tmp, orig;
|
|
unsigned int mask = (((1L << len) - 1) << start);
|
|
int r = (reg << 2);
|
|
|
|
orig = readl((vpp_base + r));
|
|
tmp = orig & ~mask;
|
|
tmp |= (value << start) & mask;
|
|
writel(tmp, (vpp_base + r));
|
|
}
|
|
|
|
/* hiu simple io */
|
|
static inline int aml_read_hiubus_s(unsigned int reg)
|
|
{
|
|
return readl((hiu_base + (reg << 2)));
|
|
}
|
|
|
|
static inline void aml_write_hiubus_s(unsigned int reg,
|
|
unsigned int val)
|
|
{
|
|
writel(val, (hiu_base + (reg << 2)));
|
|
}
|
|
|
|
static inline void aml_hiubus_update_bits_s(unsigned int reg,
|
|
unsigned int value,
|
|
unsigned int start,
|
|
unsigned int len)
|
|
{
|
|
unsigned int tmp, orig;
|
|
unsigned int mask = (((1L << len) - 1) << start);
|
|
int r = (reg << 2);
|
|
|
|
orig = readl((hiu_base + r));
|
|
tmp = orig & ~mask;
|
|
tmp |= (value << start) & mask;
|
|
writel(tmp, (hiu_base + r));
|
|
}
|
|
|
|
#endif
|