mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
Hanjie Lin
6e13c93fb7
PD#SWPL-71728 Problem: support c2 compile Solution: support c2 compile Verify: s4 Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com> Change-Id: Iafbccb16a30a06cf03352ea6e33ebde2f8296511
134 lines
2.7 KiB
C
134 lines
2.7 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __ASM_IRQFLAGS_DEBUG_ARM64_H
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#define __ASM_IRQFLAGS_DEBUG_ARM64_H
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#ifdef __KERNEL__
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#include <linux/amlogic/debug_irqflags.h>
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/*
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* CPU interrupt mask handling.
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*/
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static inline void arch_local_irq_enable(void)
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{
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irq_trace_stop_glue(0);
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if (system_has_prio_mask_debugging()) {
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u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
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WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
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}
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asm volatile(ALTERNATIVE(
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"msr daifclr, #2 // arch_local_irq_enable\n"
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"nop",
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__msr_s(SYS_ICC_PMR_EL1, "%0")
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"dsb sy",
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ARM64_HAS_IRQ_PRIO_MASKING)
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:
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: "r" ((unsigned long)GIC_PRIO_IRQON)
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: "memory");
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}
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/*
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* Save the current interrupt enable state.
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*/
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static inline unsigned long arch_local_save_flags(void)
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{
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unsigned long flags;
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asm volatile(ALTERNATIVE(
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"mrs %0, daif",
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__mrs_s("%0", SYS_ICC_PMR_EL1),
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ARM64_HAS_IRQ_PRIO_MASKING)
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: "=&r" (flags)
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:
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: "memory");
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return flags;
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}
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static inline void arch_local_irq_disable(void)
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{
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unsigned long flags = arch_local_save_flags();
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if (system_has_prio_mask_debugging()) {
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u32 pmr = read_sysreg_s(SYS_ICC_PMR_EL1);
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WARN_ON_ONCE(pmr != GIC_PRIO_IRQON && pmr != GIC_PRIO_IRQOFF);
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}
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asm volatile(ALTERNATIVE(
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"msr daifset, #2 // arch_local_irq_disable",
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__msr_s(SYS_ICC_PMR_EL1, "%0"),
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ARM64_HAS_IRQ_PRIO_MASKING)
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:
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: "r" ((unsigned long)GIC_PRIO_IRQOFF)
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: "memory");
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irq_trace_start_glue(flags);
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}
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#define local_fiq_enable() asm("msr daifclr, #1" : : : "memory")
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#define local_fiq_disable() asm("msr daifset, #1" : : : "memory")
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/*
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* restore saved IRQ state
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*/
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static inline void arch_local_irq_restore(unsigned long flags)
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{
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irq_trace_stop_glue(flags);
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asm volatile(ALTERNATIVE(
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"msr daif, %0\n"
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"nop",
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__msr_s(SYS_ICC_PMR_EL1, "%0")
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"dsb sy",
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ARM64_HAS_IRQ_PRIO_MASKING)
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:
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: "r" (flags)
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: "memory");
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}
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static inline int arch_irqs_disabled_flags(unsigned long flags)
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{
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int res;
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asm volatile(ALTERNATIVE(
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"and %w0, %w1, #" __stringify(PSR_I_BIT),
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"eor %w0, %w1, #" __stringify(GIC_PRIO_IRQON),
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ARM64_HAS_IRQ_PRIO_MASKING)
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: "=&r" (res)
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: "r" ((int)flags)
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: "memory");
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return res;
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}
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static inline unsigned long arch_local_irq_save(void)
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{
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unsigned long flags;
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flags = arch_local_save_flags();
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/*
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* There are too many states with IRQs disabled, just keep the current
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* state if interrupts are already disabled/masked.
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*/
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if (!arch_irqs_disabled_flags(flags))
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arch_local_irq_disable();
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return flags;
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}
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static inline int arch_irqs_disabled(void)
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{
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return arch_irqs_disabled_flags(arch_local_save_flags());
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}
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#endif
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#endif
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