linfang.zhao c52d22d045 drm: conflict between drm and dv when write afbc top ctrl reg [1/1] ...

PD#SWPL-153008

Problem:
conflict between drm and dv when write afbc top ctrl reg

Solution:
write osd_axi_sel bit when update_state func come firstly,
and the bit only set mali_afbcd_data one time.

Verify:
T7C

Test:
DRM-OSD-6

Change-Id: Ib05927b147f524862cfa20070cc0474dd0dc5854
Signed-off-by: linfang.zhao <linfang.zhao@amlogic.com>

2024-04-02 00:39:15 -07:00

..

arm

dts: modify android_u S805X3 1G codec_mm_cma size to 168MB. [1/1]

2024-04-01 04:39:22 -07:00

arm64

drm: conflict between drm and dv when write afbc top ctrl reg [1/1]

2024-04-02 00:39:15 -07:00

riscv

dump_stack: optimize dts property [1/1]

2023-04-16 21:24:26 -07:00