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Liming Xue
32a62cf946
PD#SWPL-222902 Problem: dsp need to reset when dsp hang Solution: add reset function when dsp panic Verify: a5 Change-Id: I3203af2530026098d929c32558abafcf328a17d5 Signed-off-by: Liming Xue <liming.xue@amlogic.com>
255 lines
7.9 KiB
C
255 lines
7.9 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef _HOST_MODULE_H
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#define _HOST_MODULE_H
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#include <linux/platform_device.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/miscdevice.h>
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#include <linux/amlogic/scpi_protocol.h>
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/*m4 cmd and subid*/
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#define SMC_M4_CMD 0x8200004E
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/*soc: g12a/sm1*/
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#define SMC_SUBID_MFH_V1_BOOT 0x20
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/*soc: p1*/
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#define SMC_SUBID_MFH_V2_BOOT 0x21
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#define SMC_SUBID_MFH_V2_RESET 0x22
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#define SMC_M4_BANK 0xFCB87430
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/*hifi dsp cmd and subid*/
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#define SMC_HIFI_DSP_CMD 0x82000090
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#define SMC_SUBID_HIFI_DSP_BOOT 0x10
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#define SMC_SUBID_HIFI_DSP_REMAP 0x11
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#define SMC_SUBID_HIFI_DSP_PWR_SET 0x13
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#define SMC_SUBID_HIFI_DSP_RESET_HIGH 0x14
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#define SMC_SUBID_SHIFT 0x8
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#define PACK_SMC_SUBID_ID(subid, id) (((subid) << SMC_SUBID_SHIFT) | (id))
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/*hifi dsp ffv to wake arm*/
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#define MBX_CMD_VAD_AWE_WAKEUP 0x62
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#define DSP_VAD_WAKUP_ARM 0x5555AAAA
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/* pm support function
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*
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* bit0: pm_support_suspend
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* bit1: pm_support_always_on
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* bit2: pm_support_ffv
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*/
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#define PM_SUPPORT_DSP_SUSPEND(pm_support) ((pm_support) & 0x1)
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#define PM_SUPPORT_DSP_ALWAYS_ON(pm_support) (((pm_support) & 0x2) >> 1)
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#define PM_SUPPORT_DSP_FFV(pm_support) (((pm_support) & 0x4) >> 2)
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struct host_module;
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struct dsp_info_t;
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struct host_data;
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struct host_mfh;
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struct host_dsp;
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struct host_data {
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struct miscdevice misc;
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char name[20];
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u8 hostid;
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struct host_module *host;
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} __packed;
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struct dsp_info_t {
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char id; /*dsp_id 0,1,2...*/
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char fw_id;
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char fw_name[32]; /*name of firmware which used for dsp*/
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char fw1_name[32]; /*name of firmware which used for dsp ddr*/
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char fw2_name[32]; /*name of firmware which used for dsp sram*/
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unsigned int phy_addr; /*phy address of firmware will be loaded on*/
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unsigned int size; /*size of reserved hifi memory*/
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} __packed;
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struct dsp_shm_info_t {
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unsigned int addr;
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unsigned int size;
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} __packed;
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struct mbox_buf {
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u32 id;
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u32 addr;
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u32 cfg0;
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} __packed;
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struct mfh_info {
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int cpuid;
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char name[30];
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};
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struct mfh_msg_buf {
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int size;
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char buf[96];
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} __packed;
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struct mfh_msg {
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struct list_head list;
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struct mfh_msg_buf msg_buf;
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struct completion complete;
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};
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#define HOSTFW_NAME_LEN 32
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#define REG_DSP_CFG0 (0x0)
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#define REG_DSP_CFG1 (0x4)
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#define REG_DSP_CFG2 (0x8)
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#define REG_DSP_RESET_VEC (0x004 << 2)
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#define HOST_IOC_MAGIC 'H'
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#define MFH_FIRMWARE_LOAD _IOWR(HOST_IOC_MAGIC, 1, struct mfh_info)
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#define MFH_CMD_SEND _IOWR(HOST_IOC_MAGIC, 2, struct mfh_msg_buf)
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#define MFH_CMD_LISTEN _IOWR(HOST_IOC_MAGIC, 3, struct mfh_msg_buf)
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#define HOST_LOAD _IOWR(HOST_IOC_MAGIC, 1, struct dsp_info_t)
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#define HOST_START _IOWR(HOST_IOC_MAGIC, 3, struct dsp_info_t)
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#define HOST_STOP _IOWR(HOST_IOC_MAGIC, 4, struct dsp_info_t)
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#define HOST_2LOAD _IOWR(HOST_IOC_MAGIC, 7, struct dsp_info_t)
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#define HOST_GET_INFO _IOWR((HOST_IOC_MAGIC), (18), \
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struct dsp_info_t)
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#define HOST_SHM_CLEAN _IOWR(HOST_IOC_MAGIC, 64, \
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struct dsp_shm_info_t)
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#define HOST_SHM_INV _IOWR(HOST_IOC_MAGIC, 65, \
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struct dsp_shm_info_t)
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/** struct host_mfh, the struct of host mfh
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* @mfh_info: m4 mfh_info struct
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* @mfh_buf: m4 mfh_buf struct
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* @mfh_msg: m4 mfh_msg struct
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*/
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struct host_mfh {
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struct mfh_info mfh_info;
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struct mfh_msg_buf mfh_buf;
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struct mfh_msg *mfh_msg;
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};
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/** struct host_dsp, the struct of host dsp
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* @mbox_buf： dsp mbox_buf struct
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* @shminfo： dsp dsp_shm_info_t struct
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* @usrinfo: dsp dsp_info_t struct
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* @pm_support_suspend: dsp support suspend/resume
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* @pm_support_always_on:dsp work when arm suspend
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* @pm_support_ffv: If support dsp far field voice
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* @input_device: input_device for ffv to wakeup screen
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* @clk_hifi: dsp hifi clk source
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*/
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struct host_dsp {
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struct mbox_buf mbox_buf;
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struct dsp_shm_info_t shminfo;
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struct dsp_info_t *usrinfo;
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u8 pm_support_suspend;
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u8 pm_support_always_on;
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u8 pm_support_ffv;
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struct input_dev *input_device;
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struct clk *clk_hifi;
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struct host_module *host;
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struct delayed_work host_ffv_work;
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struct workqueue_struct *host_ffv_wq;
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u8 uevent_flag;
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};
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/** struct host_module, the struct of host module
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* @dev: struct device for this Host driver
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* @base_reg: Base register of host
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* @health_reg: Health monitor register
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* @device_spt_reg: Whether the boards support dsp/m4
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* @sram_addr: Sram virtual address
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* @phys_sram_addr: Sram physical address
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* @phys_sram_size: Sram physical address size
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* @ddr_addr: Ddr virtual address
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* @shm_addr: Share memory address
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* @phys_ddr_addr: Ddr physical address
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* @phys_ddr_size: Ddr physical address size
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* @phys_shm_addr: Share memory physical address
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* @phys_shm_size: Share memory physical address size
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* @phys_remap_addr: Ddr physical remap address
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* @phys_remap_size: Ddr physical remap size
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* @start_pos: Boot from sram, ddr or both
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* @logbuff_polling_period_ms: Host logbuff polling period
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* @health_polling_ms: Host health polling period
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* @addr_remap: Addr remap flag
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* @clk: Host clock
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* @clk_rate: Host clock rate
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* @pm_support: If support power management
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* @mbox_chan_to_dev: Mbox channel from host to dev
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* @mbox_chan_from_dev: Mbox channel from dev to host
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* @init_mbox_chan: Mbox channel for dev init
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* @misc: Misc device
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* @hostid: Host id
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* @fname0: Host firmware name0
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* @fname1: Host firmware name1
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* @suspended: Host suspend flag
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* @pre_cnt: Host health monitor last value
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* @cur_cnt: Host health monitor current value
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* @host_monitor_work: Host monitor work
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* @host_logbuff_work: Host logbuff work
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* @host_wq: Host work queue
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* @hang: Host hang flag
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* @mbox_buf: Aocpu mbox buffer
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* @firmware_load: Host firmware is load
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* @firmware_started: host dsp firmware started
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* @device_support_bit: DSP/M4 support bit
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* @host_data: Struct host_data
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* @host_mfh: Struct host_mfh
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* @host_dsp: Struct host_dsp
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* @nb: Host die notifier
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*/
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struct host_module {
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struct device *dev;
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void __iomem *base_reg;
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void __iomem *health_reg;
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void __iomem *device_spt_reg;
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void __iomem *sram_addr;
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phys_addr_t phys_sram_addr;
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phys_addr_t phys_sram_size;
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void __iomem *ddr_addr;
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void __iomem *shm_addr;
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phys_addr_t phys_ddr_addr;
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phys_addr_t phys_ddr_size;
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phys_addr_t phys_shm_addr;
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phys_addr_t phys_shm_size;
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phys_addr_t phys_remap_addr;
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phys_addr_t phys_remap_size;
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u8 start_pos;
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u32 logbuff_polling_ms;
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u32 health_polling_ms;
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bool addr_remap;
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struct clk *clk;
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u32 clk_rate;
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u8 pm_support;
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struct mbox_chan *mbox_chan_to_dev;
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struct mbox_chan *mbox_chan_from_dev;
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struct mbox_chan *init_mbox_chan;
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struct miscdevice *misc;
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int hostid;
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char fname0[HOSTFW_NAME_LEN];
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char fname1[HOSTFW_NAME_LEN];
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u32 pre_cnt, cur_cnt;
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struct delayed_work host_monitor_work;
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struct delayed_work host_logbuff_work;
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struct workqueue_struct *host_wq;
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struct workqueue_struct *host_logbuff_wq;
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u32 hang;
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bool core_reset;
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u32 firmware_load;
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u32 firmware_started;
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u32 device_support_bit;
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struct host_data *host_data;
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struct host_mfh *host_mfh;
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struct host_dsp *host_dsp;
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struct notifier_block nb;
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};
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bool host_firmware_ready(u8 host_id);
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struct device *host_to_device(u8 host_id);
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void host_core_reset(struct host_module *host);
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int host_phyaddr_info(u8 host_id, phys_addr_t *addr, phys_addr_t *size);
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#endif /*_HOST_MODULE_H*/
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