mirror of
https://github.com/hardkernel/kernel_common_drivers.git
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f0ef876a1f
PD#SWPL-133575 Problem: provide frc_is_on for vpp Solution: provide frc_is_on for vpp Verify: T3X Change-Id: Ic010734fdbe45b5bc5998f2e474601ea187d56cd Signed-off-by: dongfei.li <dongfei.li@amlogic.com>
238 lines
6.3 KiB
C
238 lines
6.3 KiB
C
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/device.h>
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#include <linux/cdev.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_fdt.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/of_irq.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/stat.h>
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#include <linux/errno.h>
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#include <linux/uaccess.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/ctype.h>
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#include <linux/vmalloc.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/time.h>
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#include <asm/div64.h>
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#include <linux/sched/clock.h>
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#include <linux/amlogic/media/vpu/vpu.h>
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#include <linux/amlogic/media/vfm/vframe.h>
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#include <linux/amlogic/media/vfm/vframe_provider.h>
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#include <linux/amlogic/media/vfm/vframe_receiver.h>
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#include <linux/amlogic/media/frame_sync/timestamp.h>
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#include <linux/amlogic/media/frame_sync/tsync.h>
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#include <linux/amlogic/media/vout/vinfo.h>
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#include <linux/amlogic/media/vout/vout_notify.h>
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#include <linux/amlogic/media/frc/frc_reg.h>
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#include <linux/amlogic/media/frc/frc_common.h>
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#include <linux/amlogic/media/registers/cpu_version.h>
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#include "frc_drv.h"
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#include "frc_proc.h"
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#include "frc_interface.h"
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/*
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* every vsync handle
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* vf : current input vf
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* cur_video_sts: current video state
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* called in vpp vs ir :vsync_fisr_in
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* defined(CONFIG_AMLOGIC_MEDIA_FRC)
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*/
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int frc_input_handle(struct vframe_s *vf, struct vpp_frame_par_s *cur_video_sts)
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{
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struct frc_dev_s *devp = get_frc_devp();
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u64 timestamp = sched_clock();
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if (!devp)
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return -1;
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if (!devp->probe_ok || !devp->power_on_flag)
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return -1;
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/*update vs time*/
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devp->frc_sts.vs_cnt++;
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timestamp = div64_u64(timestamp, 1000);
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devp->vs_duration = timestamp - devp->vs_timestamp;
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devp->vs_timestamp = timestamp;
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// frc_vpp_vs_ir_chk_film(devp);
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/*vframe change detect and video state detects*/
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frc_input_vframe_handle(devp, vf, cur_video_sts);
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/*frc work mode handle*/
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// frc_state_handle_old(devp);
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// frc_state_handle(devp);
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frc_state_handle_new(devp);
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return 0;
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}
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EXPORT_SYMBOL(frc_input_handle);
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/*
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* for other module control frc
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* FRC_STATE_ENABLE: FRC is working
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* FRC_STATE_DISABLE: video data input to frc hw module, but frc not works
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* FRC_STATE_BYPASS: video data not input to frc module
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*
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*/
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int frc_set_mode(enum frc_state_e state)
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{
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if (state == FRC_STATE_DISABLE)
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frc_change_to_state(FRC_STATE_DISABLE);
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else if (state == FRC_STATE_BYPASS)
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frc_change_to_state(FRC_STATE_BYPASS);
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else if (state == FRC_STATE_ENABLE)
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frc_change_to_state(FRC_STATE_ENABLE);
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return 0;
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}
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/*
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* get current frc video latency
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* return: ms
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*/
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int frc_get_video_latency(void)
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{
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struct frc_dev_s *devp = get_frc_devp();
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// u32 out_frm_dly_num;
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struct vinfo_s *vinfo = get_current_vinfo();
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u32 vout_hz = 0;
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u32 delay_time = 0; /*ms*/
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u32 delay = 0; /*ms*/
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if (vinfo && vinfo->sync_duration_den != 0)
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vout_hz = vinfo->sync_duration_num / vinfo->sync_duration_den;
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// out_frm_dly_num = READ_FRC_BITS(FRC_REG_TOP_CTRL9, 24, 4);
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if (vout_hz != 0)
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delay = 35 * 100 / vout_hz;
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// delay_time = out_frm_dly_num;
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if (!devp || !vinfo)
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return 0;
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if (devp->frc_sts.auto_ctrl == 1) {
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// if (devp->in_sts.vf_sts == VFRAME_NO)
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// delay_time = delay;
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// else if (devp->frc_sts.state == FRC_STATE_BYPASS ||
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// devp->frc_sts.state == FRC_STATE_DISABLE)
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// delay_time = 0;
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// else if (devp->frc_sts.state == FRC_STATE_ENABLE)
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// delay_time = delay;
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delay_time = delay;
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} else {
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delay_time = 0;
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}
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return delay_time;
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}
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EXPORT_SYMBOL(frc_get_video_latency);
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int frc_is_on(void)
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{
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struct frc_dev_s *devp = get_frc_devp();
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if (!devp)
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return 0;
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if (!devp->probe_ok || !devp->power_on_flag)
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return 0;
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if (devp->clk_state == FRC_CLOCK_OFF)
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return 0;
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if ((READ_FRC_REG(FRC_TOP_CTRL) & 0x01) == FRC_STATE_ENABLE &&
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devp->in_sts.vs_cnt >= devp->other2_flag)
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return 1;
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else
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return 0;
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}
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EXPORT_SYMBOL(frc_is_on);
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int frc_is_supported(void)
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{
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struct frc_dev_s *devp = get_frc_devp();
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if (!devp)
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return 0;
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if (!devp->probe_ok)
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return 0;
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return 1;
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}
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EXPORT_SYMBOL(frc_is_supported);
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int frc_set_seg_display(u8 enable, u8 seg1, u8 seg2, u8 seg3)
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{
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struct frc_dev_s *devp = get_frc_devp();
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if (!devp)
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return 0;
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if (!devp->probe_ok)
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return 0;
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if (devp->clk_state == FRC_CLOCK_OFF)
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return 0;
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if (enable) {
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_POSI_AND_NUM41_NUM42, 0xE1 << 24, 0xFF000000);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 1 << 31, BIT_31);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 1 << 23, BIT_23);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 1 << 15, BIT_15);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 2 << 28, 0x70000000);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 1 << 20, 0x700000);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 2 << 12, 0x7000);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46,
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seg1 << 24, 0xF000000);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, seg2 << 16, 0xF0000);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, seg3 << 8, 0xF00);
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} else {
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 0, BIT_31);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 0, BIT_23);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_NUM43_NUM44_NUM45_NUM46, 0, BIT_15);
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UPDATE_FRC_REG_BITS(FRC_MC_SEVEN_FLAG_POSI_AND_NUM41_NUM42, 0x03 << 24, 0xFF000000);
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}
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return 1;
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}
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EXPORT_SYMBOL(frc_set_seg_display);
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int frc_drv_get_1st_frm(void)
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{
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struct frc_dev_s *devp = get_frc_devp();
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if (!devp)
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return 1;
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if (!devp->probe_ok)
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return 1;
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if (devp->frc_sts.state != FRC_STATE_ENABLE)
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return 1;
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else if ((READ_FRC_REG(FRC_TOP_CTRL) & 0x01) == 0)
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return 1;
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else
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return ((READ_FRC_REG(FRC_REG_PAT_POINTER) >> 12) & 0x1);
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}
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EXPORT_SYMBOL(frc_drv_get_1st_frm);
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int frc_get_n2m_setting(void)
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{
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struct frc_dev_s *devp = get_frc_devp();
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if (!devp)
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return 0;
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if (!devp->probe_ok)
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return 0;
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if (devp->in_out_ratio == FRC_RATIO_1_1)
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return 1;
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else if (devp->in_out_ratio == FRC_RATIO_1_2)
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return 2;
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else
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return 0;
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}
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EXPORT_SYMBOL(frc_get_n2m_setting);
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