mirror of
https://github.com/hardkernel/kernel_common_drivers.git
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qiankun.wang
0335d01014
PD#SWPL-129901 Problem: IO-R-E can't read the register's data. Solution: when the "read" action is over, the hook function will get the value from the action. Verify: SC2 Change-Id: I12426209bf92e5c242022041e01ed6a7711808dc Signed-off-by: qiankun.wang <qiankun.wang@amlogic.com>
102 lines
3.0 KiB
C
102 lines
3.0 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __AMLOGIC_ASM_IO_64_H
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#define __AMLOGIC_ASM_IO_64_H
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#include <linux/amlogic/aml_iotrace.h>
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/*
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* Generic IO read/write. These perform native-endian accesses.
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*/
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#define __raw_writeb __raw_writeb
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static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
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{
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pstore_ftrace_io_wr((unsigned long)addr, (unsigned long)val);
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asm volatile("strb %w0, [%1]" : : "rZ" (val), "r" (addr));
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pstore_ftrace_io_wr_end((unsigned long)addr, (unsigned long)val);
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}
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#define __raw_writew __raw_writew
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static inline void __raw_writew(u16 val, volatile void __iomem *addr)
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{
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pstore_ftrace_io_wr((unsigned long)addr, (unsigned long)val);
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asm volatile("strh %w0, [%1]" : : "rZ" (val), "r" (addr));
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pstore_ftrace_io_wr_end((unsigned long)addr, (unsigned long)val);
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}
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#define __raw_writel __raw_writel
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static __always_inline void __raw_writel(u32 val, volatile void __iomem *addr)
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{
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pstore_ftrace_io_wr((unsigned long)addr, (unsigned long)val);
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asm volatile("str %w0, [%1]" : : "rZ" (val), "r" (addr));
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pstore_ftrace_io_wr_end((unsigned long)addr, (unsigned long)val);
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}
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#define __raw_writeq __raw_writeq
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static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
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{
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pstore_ftrace_io_wr((unsigned long)addr, (unsigned long)val);
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asm volatile("str %x0, [%1]" : : "rZ" (val), "r" (addr));
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pstore_ftrace_io_wr_end((unsigned long)addr, (unsigned long)val);
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}
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#define __raw_readb __raw_readb
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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u8 val;
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pstore_ftrace_io_rd((unsigned long)addr);
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asm volatile(ALTERNATIVE("ldrb %w0, [%1]",
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"ldarb %w0, [%1]",
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ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
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: "=r" (val) : "r" (addr));
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pstore_ftrace_io_rd_end((unsigned long)addr, (unsigned long)val);
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return val;
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}
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#define __raw_readw __raw_readw
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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u16 val;
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pstore_ftrace_io_rd((unsigned long)addr);
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asm volatile(ALTERNATIVE("ldrh %w0, [%1]",
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"ldarh %w0, [%1]",
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ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
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: "=r" (val) : "r" (addr));
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pstore_ftrace_io_rd_end((unsigned long)addr, (unsigned long)val);
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return val;
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}
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#define __raw_readl __raw_readl
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static __always_inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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u32 val;
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pstore_ftrace_io_rd((unsigned long)addr);
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asm volatile(ALTERNATIVE("ldr %w0, [%1]",
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"ldar %w0, [%1]",
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ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
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: "=r" (val) : "r" (addr));
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pstore_ftrace_io_rd_end((unsigned long)addr, (unsigned long)val);
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return val;
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}
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#define __raw_readq __raw_readq
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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u64 val;
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pstore_ftrace_io_rd((unsigned long)addr);
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asm volatile(ALTERNATIVE("ldr %0, [%1]",
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"ldar %0, [%1]",
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ARM64_WORKAROUND_DEVICE_LOAD_ACQUIRE)
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: "=r" (val) : "r" (addr));
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pstore_ftrace_io_rd_end((unsigned long)addr, (unsigned long)val);
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return val;
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}
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#endif /* __AMLOGIC_ASM_IO_H */
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