mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
Gaowei Zhao
711cf53fd3
PD#SWPL-130241 Problem: not support setHpdSignal and getHpdSignal Solution: provide 2 ioctrl commands to setHpdSignal and getHpdSignal Verify: ohm Change-Id: I8d2844b492b8e788388e3d1e7e25994bea14b4b8 Signed-off-by: Gaowei Zhao <gaowei.zhao@amlogic.com>
116 lines
3.3 KiB
C
116 lines
3.3 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) WITH Linux-syscall-note */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef HDMI_RX_H_
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#define HDMI_RX_H_
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struct _hdcp_ksv {
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int bksv0;
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int bksv1;
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};
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struct pd_infoframe_s {
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unsigned int HB;
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unsigned int PB0;
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unsigned int PB1;
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unsigned int PB2;
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unsigned int PB3;
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unsigned int PB4;
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unsigned int PB5;
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unsigned int PB6;
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};
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enum hdcp14_key_mode_e {
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NORMAL_MODE,
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SECURE_MODE,
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};
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/* source product descriptor infoFrame - 0x83 */
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//0x00 "unknown",
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//0x01 "Digital STB",
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//0x02 "DVD player",
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//0x03 "D-VHS",
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//0x04 "HDD Videorecorder",
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//0x05 "DVC",
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//0x06 "DSC",
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//0x07 "Video CD",
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//0x08 "Game",
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//0x09 "PC general",
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//0x0A "Blu-Ray Disc (BD)",
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//0x0B "Super Audio CD",
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//0x0C "HD DVD",
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//0x0D "PMP",
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//0x1A "FREESYNC"
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struct spd_infoframe_st {
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unsigned char pkttype;
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unsigned char version;
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unsigned char length;
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//u8 rsd; //note: T3 has not this byte. T5 has it.
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unsigned char checksum;
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//u8 ieee_oui[3]; //data[1:3]
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union meta_u {
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struct freesync_st {
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/*PB1-3*/
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unsigned int ieee:24;
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unsigned int rsvd:8;
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unsigned char rsvd1;
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/*PB6*/
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unsigned char supported:1;
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unsigned char enabled:1;
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unsigned char active:1;
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//u8 cs_active:1;
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unsigned char rsvd2:5;
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//u8 ld_disable:1;
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//u8 rsvd3:3;
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unsigned char min_frame_rate;
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unsigned char max_frame_rate;
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/*pb9-pb27*/
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unsigned char data[19];
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} freesync;
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unsigned char data[27];
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struct spd_data_st {
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/*Vendor Name Character*/
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unsigned char vendor_name[8];
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/*Product Description Character*/
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unsigned char product_des[16];
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/*byte 25*/
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unsigned char source_info;
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unsigned char rsvd[3];
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} spddata;
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} des_u;
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};
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struct hdmirx_hpd_info {
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int signal;
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int port;
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};
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#define HDMI_IOC_MAGIC 'H'
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#define HDMI_IOC_HDCP_ON _IO(HDMI_IOC_MAGIC, 0x01)
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#define HDMI_IOC_HDCP_OFF _IO(HDMI_IOC_MAGIC, 0x02)
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#define HDMI_IOC_EDID_UPDATE _IO(HDMI_IOC_MAGIC, 0x03)
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#define HDMI_IOC_PC_MODE_ON _IO(HDMI_IOC_MAGIC, 0x04)
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#define HDMI_IOC_PC_MODE_OFF _IO(HDMI_IOC_MAGIC, 0x05)
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#define HDMI_IOC_HDCP22_AUTO _IO(HDMI_IOC_MAGIC, 0x06)
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#define HDMI_IOC_HDCP22_FORCE14 _IO(HDMI_IOC_MAGIC, 0x07)
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#define HDMI_IOC_HDCP_GET_KSV _IOR(HDMI_IOC_MAGIC, 0x09, struct _hdcp_ksv)
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#define HDMI_IOC_HDMI_20_SET _IO(HDMI_IOC_MAGIC, 0x08)
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#define HDMI_IOC_PD_FIFO_PKTTYPE_EN _IOW(HDMI_IOC_MAGIC, 0x0a, unsigned int)
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#define HDMI_IOC_PD_FIFO_PKTTYPE_DIS _IOW(HDMI_IOC_MAGIC, 0x0b, unsigned int)
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#define HDMI_IOC_GET_PD_FIFO_PARAM _IOWR(HDMI_IOC_MAGIC, 0x0c, struct pd_infoframe_s)
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#define HDMI_IOC_HDCP14_KEY_MODE _IOR(HDMI_IOC_MAGIC, 0x0d, enum hdcp14_key_mode_e)
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#define HDMI_IOC_HDCP22_NOT_SUPPORT _IO(HDMI_IOC_MAGIC, 0x0e)
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#define HDMI_IOC_SET_AUD_SAD _IOW(HDMI_IOC_MAGIC, 0x0f, int)
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#define HDMI_IOC_GET_AUD_SAD _IOR(HDMI_IOC_MAGIC, 0x10, int)
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#define HDMI_IOC_GET_SPD_SRC_INFO _IOR(HDMI_IOC_MAGIC, 0x11, struct spd_infoframe_st)
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#define HDMI_5V_PIN_STATUS _IOR(HDMI_IOC_MAGIC, 0x12, unsigned int)
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#define HDMI_IOC_EDID_UPDATE_WITH_PORT _IOW(HDMI_IOC_MAGIC, 0x13, unsigned char)
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#define HDMI_IOC_5V_WAKE_UP_ON _IO(HDMI_IOC_MAGIC, 0x13)
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#define HDMI_IOC_5V_WAKE_UP_OFF _IO(HDMI_IOC_MAGIC, 0x14)
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#define HDMI_IOC_SET_HPD _IOW(HDMI_IOC_MAGIC, 0x15, struct hdmirx_hpd_info)
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#define HDMI_IOC_GET_HPD _IOR(HDMI_IOC_MAGIC, 0x16, struct hdmirx_hpd_info)
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#endif
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