Jian Cao ada197bb5d vpp: dynamically modify vpu_clk when display mode changes [4/4] ...

PD#SWPL-182516

Problem:
need to add vpu_overclk flow

Solution:
1. add notifier event
2. set vpu clkb
3. get and check vdin status

Verify:
t5m

Change-Id: Id3a1faba9e13a6a102d6f916d9c3743476ea577a
Signed-off-by: Jian Cao <jian.cao@amlogic.com>

2024-09-02 23:04:07 -07:00

..

drm

drm: encoder possible_crtc filled with real vout index [1/1]

2024-08-29 03:12:22 -07:00

dt-bindings

clk: s6: Update the axi_clk register bits definition [1/1]

2024-08-29 02:43:38 -07:00

linux/amlogic

vpp: dynamically modify vpu_clk when display mode changes [4/4]

2024-09-02 23:04:07 -07:00

trace/events

drm: add rdma table for drm osd registers [1/1]

2024-07-17 23:57:23 -07:00

uapi/amlogic

uapi: fix build warning [1/1]

2024-08-30 02:08:36 -07:00