mirror of
https://github.com/hardkernel/kernel_common_drivers.git
synced 2026-06-25 12:03:48 +09:00
Sunny Luo
0f3f980eaf
PD#SWPL-147512 Problem: LDIM requires a strict timing sequence to match with the vsync signal Solution: SPICC supports vsync/line-n triggering control, Add a interface to start/stop the vsync triggering transfer for LDIM Porting from 5.4 1f62b7d1 Verify: t3 t982 Change-Id: Ida2f63cbe318dceebbe97514e41a588e4ea143d4 Signed-off-by: Sunny Luo <sunny.luo@amlogic.com>
61 lines
1.3 KiB
C
61 lines
1.3 KiB
C
/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
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/*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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*/
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#ifndef __AML_SPI_H_
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#define __AML_SPI_H_
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enum {
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DMA_TRIG_NORMAL = 0,
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DMA_TRIG_VSYNC,
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DMA_TRIG_LINE_N,
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};
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struct spicc_controller_data {
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unsigned ccxfer_en:1;
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unsigned timing_en:1;
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unsigned ss_leading_gap:4;
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unsigned ss_trailing_gap:4;
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unsigned tx_tuning:4;
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unsigned rx_tuning:4;
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unsigned dummy_ctl:1;
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void (*dirspi_start)(struct spi_device *spi);
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void (*dirspi_stop)(struct spi_device *spi);
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int (*dirspi_async)(struct spi_device *spi,
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u8 *tx_buf,
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u8 *rx_buf,
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int len,
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void (*complete)(void *context),
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void *context);
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int (*dirspi_sync)(struct spi_device *spi,
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u8 *tx_buf,
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u8 *rx_buf,
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int len);
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int (*dirspi_dma_trig)(struct spi_device *spi,
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dma_addr_t tx_dma,
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dma_addr_t rx_dma,
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int len,
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u8 src);
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int (*dirspi_dma_trig_start)(struct spi_device *spi);
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int (*dirspi_dma_trig_stop)(struct spi_device *spi);
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};
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struct spicc_transfer {
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struct spi_transfer xfer;
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unsigned dc_level:1;
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#define DC_LEVEL_LOW 0
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#define DC_LEVEL_HIGH 1
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unsigned read_turn_around:2;
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unsigned dc_mode:2;
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#define DC_MODE_NONE 0
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#define DC_MODE_PIN 1
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#define DC_MODE_9BIT 2
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void *tx_ccsg;
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void *rx_ccsg;
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int tx_ccsg_len;
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int rx_ccsg_len;
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};
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#endif
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