hang.cheng a5067c5224 dptx: add protection for abnormal mode set case [1/1] ...

PD#SWPL-253283

Problem:
1.need to continue mode setting if link training
fail under pxp mode
2.need to update link training param if force
link rate/lane count is used
3.eDP + VENC1 path is not enabled
4.there's no link training retry mechanism
5.there may be no venc clk if there's hotplug out
during  mode set

Solution:
1.ignore link training fail under pxp mode
2.update link training HW link rate/lane count even
if link training fail for PXP mode, update HW format
param if link training pass
3.add VENC1->eDPtx path config
sync https://scgit.amlogic.com/#/c/614715/3
sync https://scgit.amlogic.com/#/c/607554/2
4.add link training retry mechanism for debug purpose
5.if there's hotplug out during mode set, still set
venc clk for vsync, skip core & phy setting

Verify:
A9

Test:
1.DRM-TX-37
2.DRM-DPTX-16

Change-Id: I4333da212045a8c576c2433bf5b030d787a2302a
Signed-off-by: hang.cheng <hang.cheng@amlogic.com>

2026-02-05 22:43:09 -08:00

..

amlogic

dptx: add protection for abnormal mode set case [1/1]

2026-02-05 22:43:09 -08:00

upstream_version.h

upgrade: common16-6.12 upgrade to 6.12.38 [2/3]

2025-11-05 20:02:58 -07:00