Huqiang Qin 47b34f674b saradc: s7d+s6: enable saradc trim [1/1] ...

PD#SWPL-176611

Problem:
The calibration value needs to be read from efuse
and written to the controller.

Solution:
REG5 and REG6 are configured by BL2 at initialization.

Verify:
S7D/BM201 S6/BL201

Change-Id: I6ba3682cda4c63bf305138d041144e27a2a59f01
Signed-off-by: Huqiang Qin <huqiang.qin@amlogic.com>

2024-07-12 02:14:18 -07:00

..

arm

saradc: s7d+s6: enable saradc trim [1/1]

2024-07-12 02:14:18 -07:00

arm64

saradc: s7d+s6: enable saradc trim [1/1]

2024-07-12 02:14:18 -07:00

riscv

dump_stack: optimize dts property [1/1]

2023-04-16 21:24:26 -07:00