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hc32f460: Add support for hc32f460 micro-controllers
Signed-off-by: Steven Gotthardt <gotthardt@gmail.com>
This commit is contained in:
committed by
Kevin O'Connor
parent
94cbf5ff48
commit
72b6bd7efa
189
src/hc32f460/serial.c
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189
src/hc32f460/serial.c
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// HC32F460 serial
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//
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// Copyright (C) 2022 Steven Gotthardt <gotthardt@gmail.com>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "autoconf.h" // CONFIG_SERIAL_BAUD
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#include "command.h" // DECL_CONSTANT_STR
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#include "internal.h"
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#include "sched.h" // DECL_INIT
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#include "generic/serial_irq.h"
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#include "generic/armcm_boot.h"
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#include "hc32f460_usart.h"
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#include "hc32f460_gpio.h"
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#include "hc32f460_pwc.h"
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#define USART_BAUDRATE (CONFIG_SERIAL_BAUD)
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// Aquila 1.0.3 pins for TX, RX to CH304 on PA15 and PA09
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// for the LCD connector: TX, RX on PC00 and PC01
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#if CONFIG_HC32F460_SERIAL_PA15_PA9
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA15,PA9");
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#define USART_RX_PORT (PortA)
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#define USART_RX_PIN (Pin15)
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#define USART_TX_PORT (PortA)
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#define USART_TX_PIN (Pin09)
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#elif CONFIG_HC32F460_SERIAL_PC0_PC1
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PC0,PC1");
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#define USART_RX_PORT (PortC)
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#define USART_RX_PIN (Pin00)
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#define USART_TX_PORT (PortC)
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#define USART_TX_PIN (Pin01)
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#elif CONFIG_HC32F460_SERIAL_PA3_PA2
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA3,PA2");
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#define USART_RX_PORT (PortA)
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#define USART_RX_PIN (Pin03)
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#define USART_TX_PORT (PortA)
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#define USART_TX_PIN (Pin02)
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#elif CONFIG_HC32F460_SERIAL_PA7_PA8
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DECL_CONSTANT_STR("RESERVE_PINS_serial", "PA7,PA8");
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#define USART_RX_PORT (PortA)
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#define USART_RX_PIN (Pin07)
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#define USART_TX_PORT (PortA)
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#define USART_TX_PIN (Pin08)
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#endif
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// use USART 1 for serial connection
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#define USARTx M4_USART1
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#define USART_ENABLE (PWC_FCG1_PERIPH_USART1 | PWC_FCG1_PERIPH_USART2 | \
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PWC_FCG1_PERIPH_USART3 | PWC_FCG1_PERIPH_USART4)
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#define USART_RX_FUNC Func_Usart1_Rx
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#define USART_TX_FUNC Func_Usart1_Tx
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#define USART_RI_NUM INT_USART1_RI
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#define USART_TI_NUM INT_USART1_TI
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#define USART_EI_NUM INT_USART1_EI
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#define USART_TCI_NUM INT_USART1_TCI
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void
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serialError(void)
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{
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if (Set == USART_GetStatus(USARTx, UsartFrameErr))
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{
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USART_ClearStatus(USARTx, UsartFrameErr);
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// use it anyway
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serial_rx_byte(USARTx->DR_f.RDR);
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}
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if (Set == USART_GetStatus(USARTx, UsartOverrunErr))
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{
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USART_ClearStatus(USARTx, UsartOverrunErr);
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}
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}
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DECL_ARMCM_IRQ(serialError, Int001_IRQn);
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void
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serialTxComplete(void)
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{
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USART_FuncCmd(USARTx, UsartTx, Disable);
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USART_FuncCmd(USARTx, UsartTxCmpltInt, Disable);
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}
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DECL_ARMCM_IRQ(serialTxComplete, Int003_IRQn);
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void
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serialRx(void)
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{
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uint16_t data = USART_RecData(USARTx);
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// call to klipper generic/serial_irq function
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serial_rx_byte(data);
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}
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DECL_ARMCM_IRQ(serialRx, Int000_IRQn);
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void
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serialTxEmpty(void)
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{
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uint8_t data2send;
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// use helper from generic - zero means byte ready
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if (!serial_get_tx_byte(&data2send))
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{
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//USARTx->DR_f.TDR = data2send;
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USART_SendData(USARTx, data2send);
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}
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else
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{
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// no more data - stop the interrupt
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USART_FuncCmd(USARTx, UsartTxCmpltInt, Enable);
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USART_FuncCmd(USARTx, UsartTxEmptyInt, Disable);
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}
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}
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DECL_ARMCM_IRQ(serialTxEmpty, Int002_IRQn);
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// called by generic framework
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void
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serial_enable_tx_irq(void)
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{
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/* Enable TX && TX empty interrupt */
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USART_FuncCmd(USARTx, UsartTxAndTxEmptyInt, Enable);
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}
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void
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serial_init(void)
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{
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const stc_usart_uart_init_t stcInitCfg = {
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UsartIntClkCkNoOutput,
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UsartClkDiv_1,
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UsartDataBits8,
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UsartDataLsbFirst,
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UsartOneStopBit,
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UsartParityNone,
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UsartSampleBit16,
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UsartStartBitFallEdge,
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UsartRtsEnable,
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};
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// Function Clock Control - USART enable (sets bit to a 0)
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PWC_Fcg1PeriphClockCmd(USART_ENABLE, Enable);
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/* Initialize port pins for USART IO - Disable = NO subfunction */
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PORT_SetFunc(USART_RX_PORT, USART_RX_PIN, USART_RX_FUNC, Disable);
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PORT_SetFunc(USART_TX_PORT, USART_TX_PIN, USART_TX_FUNC, Disable);
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/* Initialize UART */
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USART_UART_Init(USARTx, &stcInitCfg);
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/* Set baudrate */
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USART_SetBaudrate(USARTx, USART_BAUDRATE);
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/* A word on interrupts in HC32F460
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In other vendors (STM) the irqs are assigned names in the vector list
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eg: USART1_IRQn but HC32F460 has numbered IRQs: IRQ000_IRQn IRQ143_IRQn
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Using INT_USART1_RI from hc32f460.h put in to IRQn->INTSEL
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if n = 5 then the USART1_RI iterrupt will be at IRQ005_IRQn
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For the specific case of each USART there are 5 separate irqs to map
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*/
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/* Set USART RX IRQ */
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IrqRegistration(USART_RI_NUM, Int000_IRQn);
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/* Set USART err */
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IrqRegistration(USART_EI_NUM, Int001_IRQn);
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/* Set USART TX IRQ */
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IrqRegistration(USART_TI_NUM, Int002_IRQn);
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/* Set USART TX complete IRQ */
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IrqRegistration(USART_TCI_NUM, Int003_IRQn);
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/* Enable RX && RX interrupt function */
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USART_FuncCmd(USARTx, UsartRx, Enable);
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USART_FuncCmd(USARTx, UsartRxInt, Enable);
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}
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DECL_INIT(serial_init);
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