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71 lines
1.8 KiB
C
71 lines
1.8 KiB
C
// SAMD51 timer interrupt scheduling
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//
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// Copyright (C) 2018-2019 Kevin O'Connor <kevin@koconnor.net>
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//
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// This file may be distributed under the terms of the GNU GPLv3 license.
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#include "board/irq.h" // irq_disable
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#include "board/misc.h" // timer_read_time
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#include "board/timer_irq.h" // timer_dispatch_many
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#include "internal.h" // enable_pclock
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#include "sched.h" // DECL_INIT
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// Set the next irq time
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static void
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timer_set(uint32_t value)
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{
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TC0->COUNT32.CC[0].reg = value;
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TC0->COUNT32.INTFLAG.reg = TC_INTFLAG_MC0;
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}
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// Return the current time (in absolute clock ticks).
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uint32_t __always_inline
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timer_read_time(void)
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{
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// Need to request a COUNT update and then delay for it to be ready
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TC0->COUNT32.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC;
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TC0->COUNT32.COUNT.reg;
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TC0->COUNT32.COUNT.reg;
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return TC0->COUNT32.COUNT.reg;
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}
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// Activate timer dispatch as soon as possible
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void
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timer_kick(void)
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{
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timer_set(timer_read_time() + 50);
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}
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void
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timer_init(void)
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{
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// Supply power and clock to the timer
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enable_pclock(TC0_GCLK_ID, ID_TC0);
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enable_pclock(TC1_GCLK_ID, ID_TC1);
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// Configure the timer
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TcCount32 *tc = &TC0->COUNT32;
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irqstatus_t flag = irq_save();
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tc->CTRLA.reg = 0;
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tc->CTRLA.reg = TC_CTRLA_MODE_COUNT32;
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NVIC_SetPriority(TC0_IRQn, 2);
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NVIC_EnableIRQ(TC0_IRQn);
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tc->INTENSET.reg = TC_INTENSET_MC0;
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tc->COUNT.reg = 0;
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timer_kick();
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tc->CTRLA.reg = (TC_CTRLA_MODE_COUNT32 | TC_CTRLA_PRESCALER_DIV8
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| TC_CTRLA_ENABLE);
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irq_restore(flag);
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}
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DECL_INIT(timer_init);
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// IRQ handler
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void __visible __aligned(16) // aligning helps stabilize perf benchmarks
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TC0_Handler(void)
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{
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irq_disable();
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uint32_t next = timer_dispatch_many();
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timer_set(next);
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irq_enable();
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}
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