diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
index 354ea502a580..b73ae6ecc00d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
@@ -321,6 +321,10 @@
 	status = "okay";
 };
 
+&sata0 {
+	status = "okay";
+};
+
 &u2phy1_otg {
 	phy-supply = <&vcc5v0_host>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi
index bc47d2d13cfb..12ed75ee65be 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb2-lp4.dtsi
@@ -254,6 +254,10 @@
 	status = "okay";
 };
 
+&sata0 {
+	status = "okay";
+};
+
 &u2phy0_otg {
 	phy-supply = <&vcc5v0_host>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi
index 30aa7991f865..35058121b852 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb3-lp5.dtsi
@@ -887,6 +887,10 @@
 	status = "okay";
 };
 
+&sata1 {
+	status = "okay";
+};
+
 &u2phy1_otg {
 	phy-supply = <&vcc5v0_host>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi
index e1139e16b53c..df5fe43176d0 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb2-lp5.dtsi
@@ -96,6 +96,10 @@
 	status = "okay";
 };
 
+&combphy0_ps {
+	status = "okay";
+};
+
 /*
  * mipi_dcphy0 needs to be enabled
  * when dsi0 is enabled
@@ -784,6 +788,10 @@
 	status = "okay";
 };
 
+&sata0 {
+	status = "okay";
+};
+
 &u2phy0_otg {
 	vbus-supply = <&vbus5v0_typec>;
 };
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi
index e7f5456a89c3..631e12849077 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi
@@ -52,6 +52,10 @@
 	};
 };
 
+&combphy2_psu {
+	status = "okay";
+};
+
 /*
  * mipi_dcphy0 needs to be enabled
  * when dsi0 is enabled
@@ -213,6 +217,10 @@
 	};
 };
 
+&sata2 {
+	status = "okay";
+};
+
 &u2phy2 {
 	status = "disabled";
 };