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arm64: dts: rockchip: rk3566 eink: add vir_width/vir_height for eink panel and remove gpu opp detele note

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Signed-off-by: Zorro Liu <lyx@rock-chips.com>
Change-Id: Ica99525fd947d9e33eecb3858552e5b6ab1df166
This commit is contained in:
Zorro Liu
2021-02-22 16:53:36 +08:00
committed by Tao Huang
parent 7a96299fce
commit 0022edf158
4 changed files with 64 additions and 23 deletions
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32
arch/arm64/boot/dts/rockchip/rk3566-evb2-lp4x-v10-eink.dts
View File

@@ -53,6 +53,8 @@
/* ED097TC2U1 */
panel,width = <1200>;
panel,height = <825>;
panel,vir_width = <1200>;
panel,vir_height = <825>;
panel,sdck = <25000000>;
panel,lsl = <4>;
panel,lbl = <4>;
@@ -74,6 +76,8 @@
/* ES103TC1 */
panel,width = <1872>;
panel,height = <1404>;
panel,vir_width = <1872>;
panel,vir_height = <1404>;
panel,sdck = <33300000>;
panel,lsl = <18>;
panel,lbl = <17>;
@@ -95,6 +99,8 @@
/* ES133TC1 */
panel,width = <2200>;
panel,height = <1650>;
panel,vir_width = <2208>;
panel,vir_height = <1650>;
panel,sdck = <37500000>;
panel,lsl = <4>;
panel,lbl = <8>;
@@ -112,16 +118,34 @@
panel,width-mm = <157>;
panel,height-mm = <210>;
#endif
#if 0
panel,width = <2232>;
panel,height = <1680>;
panel,vir_width = <2240>;
panel,vir_height = <1680>;
panel,sdck = <33300000>;
panel,lsl = <4>;
panel,lbl = <8>;
panel,ldl = <279>;
panel,lel = <14>;
panel,gdck-sta = <34>;
panel,lgonl = <217>;
panel,fsl = <1>;
panel,fbl = <4>;
panel,fdl = <1680>;
panel,fel = <6>;
panel,mirror = <0>;
panel,panel_16bit = <1>;
panel,panel_color = <0>;
panel,width-mm = <157>;
panel,height-mm = <210>;
#endif
};
&gmac1 {
status = "disabled";
};
&gpu_opp_table {
/delete-node/ opp-200000000;
};
&gt1x {
status = "disabled";
};

38
arch/arm64/boot/dts/rockchip/rk3566-rk817-eink-w103.dts
View File

@@ -235,10 +235,8 @@
&ebc {
/* clock rate 1000M/n, (n=1~32) */
//assigned-clocks = <&cru HCLK_EBC>, <&cru CPLL_333M>, <&cru DCLK_EBC>;
//assigned-clock-rates = <300000000>, <250000000>, <250000000>;
//assigned-clock-rates = <300000000>, <100000000>, <100000000>;
assigned-clocks = <&cru CPLL_333M>, <&cru DCLK_EBC>;
//assigned-clock-rates = <340000000>, <340000000>;
assigned-clock-rates = <250000000>, <250000000>;
status = "okay";
};
@@ -250,6 +248,8 @@
/* ED097TC2U1 */
panel,width = <1200>;
panel,height = <825>;
panel,vir_width = <1200>;
panel,vir_height = <825>;
panel,sdck = <25000000>;
panel,lsl = <4>;
panel,lbl = <4>;
@@ -266,10 +266,13 @@
panel,panel_color = <0>;
panel,width-mm = <203>;
panel,height-mm = <140>;
#else
#endif
#if 1
/* ES103TC1 */
panel,width = <1872>;
panel,height = <1404>;
panel,vir_width = <1872>;
panel,vir_height = <1404>;
panel,sdck = <33300000>;
panel,lsl = <18>;
panel,lbl = <17>;
@@ -287,6 +290,29 @@
panel,width-mm = <157>;
panel,height-mm = <210>;
#endif
#if 0
/* ES133TC1 */
panel,width = <2200>;
panel,height = <1650>;
panel,vir_width = <2208>;
panel,vir_height = <1650>;
panel,sdck = <37500000>;
panel,lsl = <4>;
panel,lbl = <8>;
panel,ldl = <275>;
panel,lel = <14>;
panel,gdck-sta = <34>;
panel,lgonl = <217>;
panel,fsl = <1>;
panel,fbl = <4>;
panel,fdl = <1650>;
panel,fel = <6>;
panel,mirror = <0>;
panel,panel_16bit = <1>;
panel,panel_color = <0>;
panel,width-mm = <157>;
panel,height-mm = <210>;
#endif
};
&cpu0 {
@@ -663,10 +689,6 @@
};
};
&gpu_opp_table {
/delete-node/ opp-200000000;
};
&i2c1 {
status = "okay";

6
arch/arm64/boot/dts/rockchip/rk3566-rk817-eink-w6.dts
View File

@@ -181,6 +181,8 @@
/* ED060XCD */
panel,width = <1024>;
panel,height = <758>;
panel,vir_width = <1024>;
panel,vir_height = <758>;
panel,sdck = <20000000>;
panel,lsl = <6>;
panel,lbl = <6>;
@@ -556,10 +558,6 @@
};
};
&gpu_opp_table {
/delete-node/ opp-200000000;
};
&i2c1 {
status = "okay";

11
arch/arm64/boot/dts/rockchip/rk3566-rk817-eink.dts
View File

@@ -146,9 +146,6 @@
&ebc {
/* clock rate 1000M/n, (n=1~32) */
//assigned-clocks = <&cru HCLK_EBC>, <&cru CPLL_333M>, <&cru DCLK_EBC>;
//assigned-clock-rates = <300000000>, <250000000>, <250000000>;
//assigned-clock-rates = <300000000>, <100000000>, <100000000>;
assigned-clocks = <&cru CPLL_333M>, <&cru DCLK_EBC>;
assigned-clock-rates = <250000000>, <250000000>;
status = "okay";
@@ -161,6 +158,8 @@
/* ED097TC2U1 */
panel,width = <1200>;
panel,height = <825>;
panel,vir_width = <1200>;
panel,vir_height = <825>;
panel,sdck = <25000000>;
panel,lsl = <4>;
panel,lbl = <4>;
@@ -181,6 +180,8 @@
/* ES103TC1 */
panel,width = <1872>;
panel,height = <1404>;
panel,vir_width = <1872>;
panel,vir_height = <1404>;
panel,sdck = <33300000>;
panel,lsl = <18>;
panel,lbl = <17>;
@@ -528,10 +529,6 @@
};
};
&gpu_opp_table {
/delete-node/ opp-200000000;
};
&i2c1 {
status = "okay";
tps65185: tps65185@68 {