From 016e8545af97fefeda1fbb0d0de9d057b790fc69 Mon Sep 17 00:00:00 2001 From: David Wu Date: Sun, 25 Feb 2018 16:58:56 +0800 Subject: [PATCH] pwm: rockchip: Make pwm pinctrl setting after pwm enabled If the PWM pinctrl uses default state, the iomux setting will be done at probe, the PWM may not be enabled at this moment. It will make PWM into an intermediate state, destroy the default hardware state, the PWM is not ready for work yet. So it is better for doing PWM pinctrl setting after PWM enabled. Change-Id: Iea34a7baf6a4d7df0c631f7f4fdab5b9d61bbd5f Signed-off-by: David Wu --- arch/arm/boot/dts/rk3036.dtsi | 8 ++++---- arch/arm/boot/dts/rk3066a.dtsi | 8 ++++---- arch/arm/boot/dts/rk3188.dtsi | 8 ++++---- arch/arm/boot/dts/rk322x.dtsi | 8 ++++---- arch/arm/boot/dts/rk3288.dtsi | 8 ++++---- arch/arm/boot/dts/rv1108.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 ++++---- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 +++--- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 ++++++------ drivers/pwm/pwm-rockchip.c | 19 ++++++++++++++++++- 10 files changed, 55 insertions(+), 38 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 669122b1e8f2..e93dc18ab44f 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -557,7 +557,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; }; @@ -568,7 +568,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; }; @@ -579,7 +579,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; }; @@ -590,7 +590,7 @@ #pwm-cells = <2>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 940d59c205d0..00f5c2c1f455 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -833,22 +833,22 @@ }; &pwm0 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_out>; }; &pwm1 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_out>; }; &pwm2 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_out>; }; &pwm3 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_out>; }; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index f7d36982e8b7..66dd72dda773 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -571,22 +571,22 @@ }; &pwm0 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_out>; }; &pwm1 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_out>; }; &pwm2 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_out>; }; &pwm3 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_out>; }; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index 4e4104faa41c..7ca08d8ee5d2 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -575,7 +575,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; }; @@ -586,7 +586,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; }; @@ -597,7 +597,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; }; @@ -609,7 +609,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index f2a044b85661..b24543b75c36 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -667,7 +667,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -678,7 +678,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -689,7 +689,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -700,7 +700,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; #pwm-cells = <2>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index ed8f6ca52c5b..97a9c649a9b2 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -379,7 +379,7 @@ interrupts = ; clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; #pwm-cells = <3>; status = "disabled"; @@ -391,7 +391,7 @@ interrupts = ; clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; #pwm-cells = <3>; status = "disabled"; @@ -403,7 +403,7 @@ interrupts = ; clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; #pwm-cells = <3>; status = "disabled"; @@ -415,7 +415,7 @@ interrupts = ; clocks = <&cru SCLK_PWM0_PMU>, <&cru PCLK_PWM0_PMU>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; #pwm-cells = <3>; status = "disabled"; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 825ba1d8b174..935b68e9d094 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -512,7 +512,7 @@ reg = <0x0 0xff1b0000 0x0 0x10>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; #pwm-cells = <3>; status = "disabled"; @@ -523,7 +523,7 @@ reg = <0x0 0xff1b0010 0x0 0x10>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; #pwm-cells = <3>; status = "disabled"; @@ -534,7 +534,7 @@ reg = <0x0 0xff1b0020 0x0 0x10>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; #pwm-cells = <3>; status = "disabled"; @@ -546,7 +546,7 @@ interrupts = ; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwmir_pin>; #pwm-cells = <3>; status = "disabled"; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index ceae7f86411a..e234a8509417 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -848,7 +848,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM1>; clock-names = "pwm"; @@ -859,7 +859,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM1>; clock-names = "pwm"; @@ -879,7 +879,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM1>; clock-names = "pwm"; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 7ec37bbcd023..19ef8ec0f841 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1255,7 +1255,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1266,7 +1266,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1277,7 +1277,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1288,7 +1288,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3a_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1814,7 +1814,7 @@ compatible = "rockchip,vop-pwm"; reg = <0x0 0xff8f01a0 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&vop1_pwm_pin>; clocks = <&cru SCLK_VOP1_PWM>; clock-names = "pwm"; @@ -1883,7 +1883,7 @@ compatible = "rockchip,vop-pwm"; reg = <0x0 0xff9001a0 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&vop0_pwm_pin>; clocks = <&cru SCLK_VOP0_PWM>; clock-names = "pwm"; diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index 43b554b7b011..c1361b8ccc99 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -36,6 +37,8 @@ struct rockchip_pwm_chip { struct pwm_chip chip; struct clk *clk; struct clk *pclk; + struct pinctrl *pinctrl; + struct pinctrl_state *active_state; const struct rockchip_pwm_data *data; void __iomem *base; bool vop_pwm_en; /* indicate voppwm mirror register state */ @@ -105,7 +108,7 @@ static void rockchip_pwm_get_state(struct pwm_chip *chip, } static void rockchip_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - struct pwm_state *state) + struct pwm_state *state) { struct rockchip_pwm_chip *pc = to_rockchip_pwm_chip(chip); unsigned long period, duty; @@ -237,6 +240,8 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, */ rockchip_pwm_get_state(chip, pwm, state); + if (state->enabled) + ret = pinctrl_select_state(pc->pinctrl, pc->active_state); out: clk_disable(pc->pclk); @@ -380,6 +385,18 @@ static int rockchip_pwm_probe(struct platform_device *pdev) goto err_clk; } + pc->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(pc->pinctrl)) { + dev_err(&pdev->dev, "Get pinctrl failed!\n"); + return PTR_ERR(pc->pinctrl); + } + + pc->active_state = pinctrl_lookup_state(pc->pinctrl, "active"); + if (IS_ERR(pc->active_state)) { + dev_err(&pdev->dev, "No active pinctrl state\n"); + return PTR_ERR(pc->active_state); + } + platform_set_drvdata(pdev, pc); pc->data = id->data;