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lcd b101ew05:support 720p 576p 480p dual display with rk610 scaler

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yxj
2012-09-11 09:33:35 +08:00
parent 2c040105a5
commit 01ac0976ea
1 changed files with 106 additions and 106 deletions
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212
drivers/video/display/screen/lcd_b101ew05.c
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@@ -88,19 +88,19 @@ int dsp_lut[256] ={
/* scaler Timing */
//1920*1080*60
#define S_OUT_CLK SCALE_RATE(148500000,66000000) //m=16 n=9 no=4
#define S_H_PW 10
#define S_H_BP 10
#define S_OUT_CLK SCALE_RATE(148500000,74250000) //m=16 n=9 no=4
#define S_H_PW 48
#define S_H_BP 98
#define S_H_VD 1280
#define S_H_FP 20
#define S_H_FP 59
#define S_V_PW 10
#define S_V_BP 10
#define S_V_PW 6
#define S_V_BP 25
#define S_V_VD 800
#define S_V_FP 13
#define S_V_FP 2
#define S_H_ST 440
#define S_V_ST 13
#define S_H_ST 495
#define S_V_ST 2
//1920*1080*50
#define S1_OUT_CLK SCALE_RATE(148500000,57375000) //m=17 n=11 no=4
@@ -134,49 +134,49 @@ int dsp_lut[256] ={
//1280*720*50
#define S3_OUT_CLK SCALE_RATE(74250000,57375000) // m=34 n=11 no=4
#define S3_H_PW 10
#define S3_H_BP 10
#define S3_OUT_CLK SCALE_RATE(74250000,67500000) // m=34 n=11 no=4
#define S3_H_PW 48
#define S3_H_BP 233
#define S3_H_VD 1280
#define S3_H_FP 77
#define S3_H_FP 59
#define S3_V_PW 2
#define S3_V_BP 8
#define S3_V_PW 6
#define S3_V_BP 25
#define S3_V_VD 800
#define S3_V_FP 6
#define S3_V_FP 2
#define S3_H_ST 459
#define S3_V_ST 13
#define S3_H_ST 540
#define S3_V_ST 3
//720*576*50
#define S4_OUT_CLK SCALE_RATE(27000000,63281250) //m=75 n=4 no=8
#define S4_H_PW 10
#define S4_H_BP 10
#define S4_OUT_CLK SCALE_RATE(27000000,70312500) //m=75 n=4 no=8
#define S4_H_PW 48
#define S4_H_BP 233
#define S4_H_VD 1280
#define S4_H_FP 185
#define S4_H_FP 59
#define S4_V_PW 10
#define S4_V_BP 10
#define S4_V_PW 9
#define S4_V_BP 57
#define S4_V_VD 800
#define S4_V_FP 48
#define S4_V_FP 2
#define S4_H_ST 81
#define S4_V_ST 48
#define S4_H_ST 90
#define S4_V_ST 2
//720*480*60
#define S5_OUT_CLK SCALE_RATE(27000000,75000000) //m=100 n=9 no=4
#define S5_H_PW 10
#define S5_H_BP 10
#define S5_H_PW 48
#define S5_H_BP 86
#define S5_H_VD 1280
#define S5_H_FP 130
#define S5_H_FP 16
#define S5_V_PW 10
#define S5_V_BP 10
#define S5_V_PW 9
#define S5_V_BP 35
#define S5_V_VD 800
#define S5_V_FP 54
#define S5_V_FP 30
#define S5_H_ST 476
#define S5_V_ST 48
#define S5_V_ST 12
#define S_DCLK_POL 1
@@ -189,90 +189,90 @@ static int set_scaler_info(struct rk29fb_screen *screen, u8 hdmi_resolution)
switch(hdmi_resolution){
case HDMI_1920x1080p_60Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S_OUT_CLK;
screen->s_hsync_len = S_H_PW;
screen->s_left_margin = S_H_BP;
screen->s_right_margin = S_H_FP;
screen->s_hsync_len = S_H_PW;
screen->s_upper_margin = S_V_BP;
screen->s_lower_margin = S_V_FP;
screen->s_vsync_len = S_V_PW;
screen->s_hsync_st = S_H_ST;
screen->s_vsync_st = S_V_ST;
break;
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S_OUT_CLK;
screen->s_hsync_len = S_H_PW;
screen->s_left_margin = S_H_BP;
screen->s_right_margin = S_H_FP;
screen->s_hsync_len = S_H_PW;
screen->s_upper_margin = S_V_BP;
screen->s_lower_margin = S_V_FP;
screen->s_vsync_len = S_V_PW;
screen->s_hsync_st = S_H_ST;
screen->s_vsync_st = S_V_ST;
break;
case HDMI_1920x1080p_50Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S1_OUT_CLK;
screen->s_hsync_len = S1_H_PW;
screen->s_left_margin = S1_H_BP;
screen->s_right_margin = S1_H_FP;
screen->s_hsync_len = S1_H_PW;
screen->s_upper_margin = S1_V_BP;
screen->s_lower_margin = S1_V_FP;
screen->s_vsync_len = S1_V_PW;
screen->s_hsync_st = S1_H_ST;
screen->s_vsync_st = S1_V_ST;
break;
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S1_OUT_CLK;
screen->s_hsync_len = S1_H_PW;
screen->s_left_margin = S1_H_BP;
screen->s_right_margin = S1_H_FP;
screen->s_hsync_len = S1_H_PW;
screen->s_upper_margin = S1_V_BP;
screen->s_lower_margin = S1_V_FP;
screen->s_vsync_len = S1_V_PW;
screen->s_hsync_st = S1_H_ST;
screen->s_vsync_st = S1_V_ST;
break;
case HDMI_1280x720p_60Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S2_OUT_CLK;
screen->s_hsync_len = S2_H_PW;
screen->s_left_margin = S2_H_BP;
screen->s_right_margin = S2_H_FP;
screen->s_hsync_len = S2_H_PW;
screen->s_upper_margin = S2_V_BP;
screen->s_lower_margin = S2_V_FP;
screen->s_vsync_len = S2_V_PW;
screen->s_hsync_st = S2_H_ST;
screen->s_vsync_st = S2_V_ST;
break;
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S2_OUT_CLK;
screen->s_hsync_len = S2_H_PW;
screen->s_left_margin = S2_H_BP;
screen->s_right_margin = S2_H_FP;
screen->s_hsync_len = S2_H_PW;
screen->s_upper_margin = S2_V_BP;
screen->s_lower_margin = S2_V_FP;
screen->s_vsync_len = S2_V_PW;
screen->s_hsync_st = S2_H_ST;
screen->s_vsync_st = S2_V_ST;
break;
case HDMI_1280x720p_50Hz:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S3_OUT_CLK;
screen->s_hsync_len = S3_H_PW;
screen->s_left_margin = S3_H_BP;
screen->s_right_margin = S3_H_FP;
screen->s_hsync_len = S3_H_PW;
screen->s_upper_margin = S3_V_BP;
screen->s_lower_margin = S3_V_FP;
screen->s_vsync_len = S3_V_PW;
screen->s_hsync_st = S3_H_ST;
screen->s_vsync_st = S3_V_ST;
break;
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S3_OUT_CLK;
screen->s_hsync_len = S3_H_PW;
screen->s_left_margin = S3_H_BP;
screen->s_right_margin = S3_H_FP;
screen->s_hsync_len = S3_H_PW;
screen->s_upper_margin = S3_V_BP;
screen->s_lower_margin = S3_V_FP;
screen->s_vsync_len = S3_V_PW;
screen->s_hsync_st = S3_H_ST;
screen->s_vsync_st = S3_V_ST;
break;
case HDMI_720x576p_50Hz_4_3:
case HDMI_720x576p_50Hz_16_9:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S4_OUT_CLK;
screen->s_hsync_len = S4_H_PW;
screen->s_left_margin = S4_H_BP;
screen->s_right_margin = S4_H_FP;
screen->s_hsync_len = S4_H_PW;
screen->s_upper_margin = S4_V_BP;
screen->s_lower_margin = S4_V_FP;
screen->s_vsync_len = S4_V_PW;
screen->s_hsync_st = S4_H_ST;
screen->s_vsync_st = S4_V_ST;
break;
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S4_OUT_CLK;
screen->s_hsync_len = S4_H_PW;
screen->s_left_margin = S4_H_BP;
screen->s_right_margin = S4_H_FP;
screen->s_hsync_len = S4_H_PW;
screen->s_upper_margin = S4_V_BP;
screen->s_lower_margin = S4_V_FP;
screen->s_vsync_len = S4_V_PW;
screen->s_hsync_st = S4_H_ST;
screen->s_vsync_st = S4_V_ST;
break;
case HDMI_720x480p_60Hz_16_9:
case HDMI_720x480p_60Hz_4_3:
/* Scaler Timing */
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S5_OUT_CLK;
screen->s_hsync_len = S5_H_PW;
screen->s_left_margin = S5_H_BP;
screen->s_right_margin = S5_H_FP;
screen->s_hsync_len = S5_H_PW;
screen->s_upper_margin = S5_V_BP;
screen->s_lower_margin = S5_V_FP;
screen->s_vsync_len = S5_V_PW;
screen->s_hsync_st = S5_H_ST;
screen->s_vsync_st = S5_V_ST;
break;
screen->hdmi_resolution = hdmi_resolution;
screen->s_pixclock = S5_OUT_CLK;
screen->s_hsync_len = S5_H_PW;
screen->s_left_margin = S5_H_BP;
screen->s_right_margin = S5_H_FP;
screen->s_hsync_len = S5_H_PW;
screen->s_upper_margin = S5_V_BP;
screen->s_lower_margin = S5_V_FP;
screen->s_vsync_len = S5_V_PW;
screen->s_hsync_st = S5_H_ST;
screen->s_vsync_st = S5_V_ST;
break;
default :
printk("%s lcd not support dual display at this hdmi resolution %d \n",__func__,hdmi_resolution);
return -1;