From 35db5a9e946185c046f69fd7a3d14fa7d115ea9e Mon Sep 17 00:00:00 2001 From: Stanley Chang Date: Wed, 19 Apr 2023 10:00:42 +0800 Subject: [PATCH 1/2] UPSTREAM: usb: dwc3: core: add support for disabling High-speed park mode Setting the PARKMODE_DISABLE_HS bit in the DWC3_USB3_GUCTL1. When this bit is set to '1' all HS bus instances in park mode are disabled For some USB wifi devices, if enable this feature it will reduce the performance. Therefore, add an option for disabling HS park mode by device-tree. In Synopsys's dwc3 data book: In a few high speed devices when an IN request is sent within 900ns of the ACK of the previous packet, these devices send a NAK. When connected to these devices, if required, the software can disable the park mode if you see performance drop in your system. When park mode is disabled, pipelining of multiple packet is disabled and instead one packet at a time is requested by the scheduler. This allows up to 12 NAKs in a micro-frame and improves performance of these slow devices. Acked-by: Thinh Nguyen Signed-off-by: Stanley Chang Link: https://lore.kernel.org/r/20230419020044.15475-1-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman Signed-off-by: William Wu (cherry-pick from commit d21a797a3eeb2b001e07ff943e5611eab67a71a3) Change-Id: I43ee416e54779a073a0ba4057edf4be8bd7886de --- drivers/usb/dwc3/core.c | 5 +++++ drivers/usb/dwc3/core.h | 4 ++++ 2 files changed, 9 insertions(+) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index 8384e534bc0c..ed3ce5eb78c6 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1099,6 +1099,9 @@ static int dwc3_core_init(struct dwc3 *dwc) if (dwc->parkmode_disable_ss_quirk) reg |= DWC3_GUCTL1_PARKMODE_DISABLE_SS; + if (dwc->parkmode_disable_hs_quirk) + reg |= DWC3_GUCTL1_PARKMODE_DISABLE_HS; + if (dwc->maximum_speed == USB_SPEED_HIGH || dwc->maximum_speed == USB_SPEED_FULL) reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; @@ -1418,6 +1421,8 @@ static void dwc3_get_properties(struct dwc3 *dwc) "snps,dis-tx-ipgap-linecheck-quirk"); dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev, "snps,parkmode-disable-ss-quirk"); + dwc->parkmode_disable_hs_quirk = device_property_read_bool(dev, + "snps,parkmode-disable-hs-quirk"); dwc->tx_de_emphasis_quirk = device_property_read_bool(dev, "snps,tx_de_emphasis_quirk"); diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 8930145d412c..a6e1c8157036 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -262,6 +262,7 @@ #define DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK BIT(26) #define DWC3_GUCTL1_DEV_L1_EXIT_BY_HW BIT(24) #define DWC3_GUCTL1_PARKMODE_DISABLE_SS BIT(17) +#define DWC3_GUCTL1_PARKMODE_DISABLE_HS BIT(16) /* Global Status Register */ #define DWC3_GSTS_OTG_IP BIT(10) @@ -1095,6 +1096,8 @@ struct dwc3_scratchpad_array { * check during HS transmit. * @parkmode_disable_ss_quirk: set if we need to disable all SuperSpeed * instances in park mode. + * @parkmode_disable_hs_quirk: set if we need to disable all HishSpeed + * instances in park mode. * @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk * @tx_de_emphasis: Tx de-emphasis value * 0 - -6dB de-emphasis @@ -1310,6 +1313,7 @@ struct dwc3 { unsigned dis_del_phy_power_chg_quirk:1; unsigned dis_tx_ipgap_linecheck_quirk:1; unsigned parkmode_disable_ss_quirk:1; + unsigned parkmode_disable_hs_quirk:1; unsigned tx_de_emphasis_quirk:1; unsigned tx_de_emphasis:2; From d04353d0020cd29c4b54f9db165f37312f8c4a2d Mon Sep 17 00:00:00 2001 From: William Wu Date: Tue, 15 Aug 2023 15:46:24 +0800 Subject: [PATCH 2/2] arm64: dts: rockchip: disable hs park mode for usb dwc3 controller Some high speed devices performance drop drastically on Rockchip platforms when connected with DWC3-xHCI controller. It's because that the DWC3 controller enable high speed park mode by default, it aims to improve performance with pipelining of multiple packet. However, for some devices (such as UVC with bulk transfer VID:04b4, PID:02f9), when an IN request is sent within 900ns of the ACK of the previous packet, these devices NAKs more than 3 times, it could decrease the performance. These slow devices include: 1. idVendor=04b4, idProduct=02f9, Product: IRay UVC 2. idVendor=1921, idProduct=21863, Product: Sandisk 3. idVendor=3744, idProduct=8552, Manufacturer: Flex Drive In order to improve compatibility with high speed devices, this patch disable HS park mode for USB DWC3 controller on all arm64 SoCs. With this patch, we test RK3588 with one slow device (IRay UVC VID:04b4, PID:02f9) and three fast devices (U2 disk VID:058f, PID:6387; U2 disk VID:0781, PID:557c; U3 disk VID:174c, PID:55aa), all of these device have no performance loss. Signed-off-by: William Wu Change-Id: I9037143fa2553317ad7ae55abeafad3b106cafcb --- arch/arm64/boot/dts/rockchip/rk1808.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3328.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3528.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3562.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3568.dtsi | 2 ++ arch/arm64/boot/dts/rockchip/rk3588.dtsi | 1 + arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 2 ++ 8 files changed, 13 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk1808.dtsi b/arch/arm64/boot/dts/rockchip/rk1808.dtsi index 3401beb0837b..429bbd657124 100644 --- a/arch/arm64/boot/dts/rockchip/rk1808.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk1808.dtsi @@ -385,6 +385,7 @@ snps,dis-del-phy-power-chg-quirk; snps,tx-ipgap-linecheck-dis-quirk; snps,xhci-trb-ent-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index bcbadbae2910..0a8357f34422 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -1003,6 +1003,7 @@ snps,dis-u2-freeclk-exists-quirk; snps,dis_u2_susphy_quirk; snps,dis_u3_susphy_quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index af24b9864153..c50bacc6a5e5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -456,6 +456,7 @@ snps,dis_u2_susphy_quirk; snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; power-domains = <&power RK3399_PD_USB3>; status = "disabled"; @@ -493,6 +494,7 @@ snps,dis_u2_susphy_quirk; snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; power-domains = <&power RK3399_PD_USB3>; status = "disabled"; diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index ba30a26d5ead..5a87757d3d00 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -650,6 +650,8 @@ snps,dis-tx-ipgap-linecheck-quirk; snps,xhci-trb-ent-quirk; snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; quirk-skip-phy-init; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index f9c593362561..2716af7ca471 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -843,6 +843,8 @@ snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-ss-quirk; quirk-skip-phy-init; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi index c2224c2a5e8c..c9ac4e7942f2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi @@ -621,6 +621,7 @@ snps,dis-tx-ipgap-linecheck-quirk; snps,dis_rxdet_inp3_quirk; snps,xhci-trb-ent-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; quirk-skip-phy-init; status = "disabled"; @@ -655,6 +656,7 @@ snps,dis-tx-ipgap-linecheck-quirk; snps,dis_rxdet_inp3_quirk; snps,xhci-trb-ent-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588.dtsi b/arch/arm64/boot/dts/rockchip/rk3588.dtsi index 0f78f6e6a20e..c3bdd738b494 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588.dtsi @@ -116,6 +116,7 @@ snps,dis-u2-freeclk-exists-quirk; snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index dcd429389151..8d64adfcdd1d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -2576,6 +2576,7 @@ snps,dis-u2-freeclk-exists-quirk; snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; quirk-skip-phy-init; status = "disabled"; @@ -2682,6 +2683,7 @@ snps,dis-del-phy-power-chg-quirk; snps,dis-tx-ipgap-linecheck-quirk; snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-hs-quirk; snps,parkmode-disable-ss-quirk; status = "disabled"; };