diff --git a/arch/arm/boot/dts/rv1126-pinctrl.dtsi b/arch/arm/boot/dts/rv1126-pinctrl.dtsi
index a7951412e0ce..8c1d771d0ad1 100644
--- a/arch/arm/boot/dts/rv1126-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rv1126-pinctrl.dtsi
@@ -8,6 +8,7 @@
 
 &pinctrl {
 	a7 {
+		/omit-if-no-ref/
 		a7m0_pins: a7m0-pins {
 			rockchip,pins =
 				/* a7_jtag_tck_m0 */
@@ -15,6 +16,7 @@
 				/* a7_jtag_tms_m0 */
 				<1 RK_PA7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		a7m1_pins: a7m1-pins {
 			rockchip,pins =
 				/* a7_jtag_tck_m1 */
@@ -24,6 +26,7 @@
 		};
 	};
 	acodec {
+		/omit-if-no-ref/
 		acodec_pins: acodec-pins {
 			rockchip,pins =
 				/* acodec_adc_clk */
@@ -43,6 +46,7 @@
 		};
 	};
 	auddsm {
+		/omit-if-no-ref/
 		auddsm_pins: auddsm-pins {
 			rockchip,pins =
 				/* auddsm_ln */
@@ -56,6 +60,7 @@
 		};
 	};
 	audpwm {
+		/omit-if-no-ref/
 		audpwmm0_pins: audpwmm0-pins {
 			rockchip,pins =
 				/* audpwm_l_m0 */
@@ -63,6 +68,7 @@
 				/* audpwm_r_m0 */
 				<4 RK_PA1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		audpwmm1_pins: audpwmm1-pins {
 			rockchip,pins =
 				/* audpwm_l_m1 */
@@ -72,6 +78,7 @@
 		};
 	};
 	can {
+		/omit-if-no-ref/
 		canm0_pins: canm0-pins {
 			rockchip,pins =
 				/* can_rxd_m0 */
@@ -79,6 +86,7 @@
 				/* can_txd_m0 */
 				<3 RK_PA1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		canm1_pins: canm1-pins {
 			rockchip,pins =
 				/* can_rxd_m1 */
@@ -88,6 +96,7 @@
 		};
 	};
 	cif {
+		/omit-if-no-ref/
 		cifm0_dvp_ctl: cifm0-dvp_ctl {
 			rockchip,pins =
 				/* cif_clkin_m0 */
@@ -131,6 +140,7 @@
 				/* cif_vsync_m0 */
 				<3 RK_PC4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		cifm1_dvp_ctl: cifm1-dvp_ctl {
 			rockchip,pins =
 				/* cif_clkin_m1 */
@@ -176,31 +186,37 @@
 		};
 	};
 	clk {
+		/omit-if-no-ref/
 		clkm0_pins: clkm0-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m0 */
 				<3 RK_PC5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		clkm1_pins: clkm1-pins {
 			rockchip,pins =
 				/* clk_out_ethernet_m1 */
 				<2 RK_PC5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		clk_32k: clk-32k {
 			rockchip,pins =
 				<0 RK_PA2 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		clk_ref: clk-ref {
 			rockchip,pins =
 				<0 RK_PA0 1 &pcfg_pull_none>;
 		};
 	};
 	emmc {
+		/omit-if-no-ref/
 		emmc_rstnout: emmc-rstnout {
 			rockchip,pins =
 				/* emmc_rstn */
 				<1 RK_PA3 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		emmc_bus8: emmc-bus8 {
 			rockchip,pins =
 				/* emmc_d0 */
@@ -220,11 +236,13 @@
 				/* emmc_d7 */
 				<0 RK_PD3 2 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		emmc_clk: emmc-clk {
 			rockchip,pins =
 				/* emmc_clk */
 				<0 RK_PD7 2 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		emmc_cmd: emmc-cmd {
 			rockchip,pins =
 				/* emmc_cmd */
@@ -232,6 +250,7 @@
 		};
 	};
 	flash {
+		/omit-if-no-ref/
 		flash_pins: flash-pins {
 			rockchip,pins =
 				/* flash_ale */
@@ -273,6 +292,7 @@
 		};
 	};
 	fspi {
+		/omit-if-no-ref/
 		fspi_pins: fspi-pins {
 			rockchip,pins =
 				/* fspi_clk */
@@ -292,6 +312,7 @@
 		};
 	};
 	i2c0 {
+		/omit-if-no-ref/
 		i2c0_xfer: i2c0-xfer {
 			rockchip,pins =
 				/* i2c0_scl */
@@ -301,6 +322,7 @@
 		};
 	};
 	i2c1 {
+		/omit-if-no-ref/
 		i2c1_xfer: i2c1-xfer {
 			rockchip,pins =
 				/* i2c1_scl */
@@ -310,6 +332,7 @@
 		};
 	};
 	i2c2 {
+		/omit-if-no-ref/
 		i2c2_xfer: i2c2-xfer {
 			rockchip,pins =
 				/* i2c2_scl */
@@ -319,6 +342,7 @@
 		};
 	};
 	i2c3 {
+		/omit-if-no-ref/
 		i2c3m0_xfer: i2c3m0-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m0 */
@@ -326,6 +350,7 @@
 				/* i2c3_sda_m0 */
 				<3 RK_PA5 5 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c3m1_xfer: i2c3m1-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m1 */
@@ -333,6 +358,7 @@
 				/* i2c3_sda_m1 */
 				<2 RK_PD5 7 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c3m2_xfer: i2c3m2-xfer {
 			rockchip,pins =
 				/* i2c3_scl_m2 */
@@ -342,6 +368,7 @@
 		};
 	};
 	i2c4 {
+		/omit-if-no-ref/
 		i2c4m0_xfer: i2c4m0-xfer {
 			rockchip,pins =
 				/* i2c4_scl_m0 */
@@ -349,6 +376,7 @@
 				/* i2c4_sda_m0 */
 				<3 RK_PA1 7 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c4m1_xfer: i2c4m1-xfer {
 			rockchip,pins =
 				/* i2c4_scl_m1 */
@@ -358,6 +386,7 @@
 		};
 	};
 	i2c5 {
+		/omit-if-no-ref/
 		i2c5m0_xfer: i2c5m0-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m0 */
@@ -365,6 +394,7 @@
 				/* i2c5_sda_m0 */
 				<2 RK_PB3 7 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c5m1_xfer: i2c5m1-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m1 */
@@ -372,6 +402,7 @@
 				/* i2c5_sda_m1 */
 				<3 RK_PB1 5 &pcfg_pull_none_smt>;
 		};
+		/omit-if-no-ref/
 		i2c5m2_xfer: i2c5m2-xfer {
 			rockchip,pins =
 				/* i2c5_scl_m2 */
@@ -381,192 +412,238 @@
 		};
 	};
 	i2s0 {
+		/omit-if-no-ref/
 		i2s0m0_lrck_rx: i2s0m0-lrck-rx {
 			rockchip,pins =
 				<3 RK_PD4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_lrck_tx: i2s0m0-lrck-tx {
 			rockchip,pins =
 				<3 RK_PD3 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_mclk: i2s0m0-mclk {
 			rockchip,pins =
 				<3 RK_PD2 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sclk_rx: i2s0m0-sclk-rx {
 			rockchip,pins =
 				<3 RK_PD1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sclk_tx: i2s0m0-sclk-tx {
 			rockchip,pins =
 				<3 RK_PD0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdi0: i2s0m0-sdi0 {
 			rockchip,pins =
 				<3 RK_PD6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo0: i2s0m0-sdo0 {
 			rockchip,pins =
 				<3 RK_PD5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo1_sdi3: i2s0m0-sdo1-sdi3 {
 			rockchip,pins =
 				<3 RK_PD7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo2_sdi2: i2s0m0-sdo2-sdi2 {
 			rockchip,pins =
 				<4 RK_PA0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m0_sdo3_sdi1: i2s0m0-sdo3-sdi1 {
 			rockchip,pins =
 				<4 RK_PA1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_lrck_rx: i2s0m1-lrck-rx {
 			rockchip,pins =
 				<3 RK_PB2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_lrck_tx: i2s0m1-lrck-tx {
 			rockchip,pins =
 				<3 RK_PA5 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_mclk: i2s0m1-mclk {
 			rockchip,pins =
 				<3 RK_PB0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sclk_rx: i2s0m1-sclk-rx {
 			rockchip,pins =
 				<3 RK_PB1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sclk_tx: i2s0m1-sclk-tx {
 			rockchip,pins =
 				<3 RK_PA4 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdi0: i2s0m1-sdi0 {
 			rockchip,pins =
 				<3 RK_PA7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo0: i2s0m1-sdo0 {
 			rockchip,pins =
 				<3 RK_PA6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo1_sdi3: i2s0m1-sdo1-sdi3 {
 			rockchip,pins =
 				<3 RK_PB3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo2_sdi2: i2s0m1-sdo2-sdi2 {
 			rockchip,pins =
 				<3 RK_PB4 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s0m1_sdo3_sdi1: i2s0m1-sdo3-sdi1 {
 			rockchip,pins =
 				<3 RK_PB5 3 &pcfg_pull_none>;
 		};
 	};
 	i2s1 {
+		/omit-if-no-ref/
 		i2s1m0_lrck: i2s1m0-lrck {
 			rockchip,pins =
 				<1 RK_PA0 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_mclk: i2s1m0-mclk {
 			rockchip,pins =
 				<0 RK_PD4 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_sclk: i2s1m0-sclk {
 			rockchip,pins =
 				<1 RK_PA1 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_sdi: i2s1m0-sdi {
 			rockchip,pins =
 				<1 RK_PA2 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m0_sdo: i2s1m0-sdo {
 			rockchip,pins =
 				<0 RK_PD6 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_lrck: i2s1m1-lrck {
 			rockchip,pins =
 				<1 RK_PD7 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_mclk: i2s1m1-mclk {
 			rockchip,pins =
 				<1 RK_PD5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_sclk: i2s1m1-sclk {
 			rockchip,pins =
 				<1 RK_PD6 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_sdi: i2s1m1-sdi {
 			rockchip,pins =
 				<2 RK_PA0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m1_sdo: i2s1m1-sdo {
 			rockchip,pins =
 				<2 RK_PA1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_lrck: i2s1m2-lrck {
 			rockchip,pins =
 				<2 RK_PD2 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_mclk: i2s1m2-mclk {
 			rockchip,pins =
 				<2 RK_PC7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_sclk: i2s1m2-sclk {
 			rockchip,pins =
 				<2 RK_PD1 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_sdi: i2s1m2-sdi {
 			rockchip,pins =
 				<2 RK_PD3 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s1m2_sdo: i2s1m2-sdo {
 			rockchip,pins =
 				<2 RK_PD0 6 &pcfg_pull_none>;
 		};
 	};
 	i2s2 {
+		/omit-if-no-ref/
 		i2s2m0_lrck: i2s2m0-lrck {
 			rockchip,pins =
 				<1 RK_PC7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_mclk: i2s2m0-mclk {
 			rockchip,pins =
 				<1 RK_PD0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_sclk: i2s2m0-sclk {
 			rockchip,pins =
 				<1 RK_PC6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_sdi: i2s2m0-sdi {
 			rockchip,pins =
 				<1 RK_PC5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m0_sdo: i2s2m0-sdo {
 			rockchip,pins =
 				<1 RK_PC4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_lrck: i2s2m1-lrck {
 			rockchip,pins =
 				<2 RK_PB2 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_mclk: i2s2m1-mclk {
 			rockchip,pins =
 				<2 RK_PB3 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_sclk: i2s2m1-sclk {
 			rockchip,pins =
 				<2 RK_PB1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_sdi: i2s2m1-sdi {
 			rockchip,pins =
 				<2 RK_PB0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		i2s2m1_sdo: i2s2m1-sdo {
 			rockchip,pins =
 				<2 RK_PA7 2 &pcfg_pull_none>;
 		};
 	};
 	lcdc {
+		/omit-if-no-ref/
 		lcdc_ctl: lcdc-ctl {
 			rockchip,pins =
 				/* lcdc_clk */
@@ -628,6 +705,7 @@
 		};
 	};
 	mcu {
+		/omit-if-no-ref/
 		mcu_pins: mcu-pins {
 			rockchip,pins =
 				/* mcu_jtag_tck */
@@ -643,69 +721,84 @@
 		};
 	};
 	mipi {
+		/omit-if-no-ref/
 		mipim1_pins: mipim1-pins {
 			rockchip,pins =
 				/* mipi_csi_clk1_m1 */
 				<2 RK_PA2 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		mipi_csi_clk0: mipi-csi-clk0 {
 			rockchip,pins =
 				<2 RK_PA3 1 &pcfg_pull_none>;
 		};
 	};
 	pdm {
+		/omit-if-no-ref/
 		pdmm0_clk: pdmm0-clk {
 			rockchip,pins =
 				/* pdm_clk0_m0 */
 				<3 RK_PD4 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_clk1: pdmm0-clk1 {
 			rockchip,pins =
 				<3 RK_PD1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi0: pdmm0-sdi0 {
 			rockchip,pins =
 				<3 RK_PD6 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi1: pdmm0-sdi1 {
 			rockchip,pins =
 				<4 RK_PA1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi2: pdmm0-sdi2 {
 			rockchip,pins =
 				<4 RK_PA0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm0_sdi3: pdmm0-sdi3 {
 			rockchip,pins =
 				<3 RK_PD7 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_clk: pdmm1-clk {
 			rockchip,pins =
 				/* pdm_clk0_m1 */
 				<3 RK_PC0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_clk1: pdmm1-clk1 {
 			rockchip,pins =
 				<3 RK_PC3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi0: pdmm1-sdi0 {
 			rockchip,pins =
 				<3 RK_PC1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi1: pdmm1-sdi1 {
 			rockchip,pins =
 				<3 RK_PC2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi2: pdmm1-sdi2 {
 			rockchip,pins =
 				<3 RK_PB6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pdmm1_sdi3: pdmm1-sdi3 {
 			rockchip,pins =
 				<3 RK_PB7 3 &pcfg_pull_none>;
 		};
 	};
 	pmic {
+		/omit-if-no-ref/
 		pmic_pins: pmic-pins {
 			rockchip,pins =
 				/* pmic_int */
@@ -715,6 +808,7 @@
 		};
 	};
 	pmu {
+		/omit-if-no-ref/
 		pmu_pins: pmu-pins {
 			rockchip,pins =
 				/* pmu_debug */
@@ -722,6 +816,7 @@
 		};
 	};
 	prelight {
+		/omit-if-no-ref/
 		prelight_pins: prelight-pins {
 			rockchip,pins =
 				/* prelight_trig_out */
@@ -729,11 +824,13 @@
 		};
 	};
 	pwm0 {
+		/omit-if-no-ref/
 		pwm0m0_pins: pwm0m0-pins {
 			rockchip,pins =
 				/* pwm0_m0 */
 				<0 RK_PB6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm0m1_pins: pwm0m1-pins {
 			rockchip,pins =
 				/* pwm0_m1 */
@@ -741,11 +838,13 @@
 		};
 	};
 	pwm1 {
+		/omit-if-no-ref/
 		pwm1m0_pins: pwm1m0-pins {
 			rockchip,pins =
 				/* pwm1_m0 */
 				<0 RK_PB7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm1m1_pins: pwm1m1-pins {
 			rockchip,pins =
 				/* pwm1_m1 */
@@ -753,11 +852,13 @@
 		};
 	};
 	pwm10 {
+		/omit-if-no-ref/
 		pwm10m0_pins: pwm10m0-pins {
 			rockchip,pins =
 				/* pwm10_m0 */
 				<3 RK_PA6 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm10m1_pins: pwm10m1-pins {
 			rockchip,pins =
 				/* pwm10_m1 */
@@ -765,11 +866,13 @@
 		};
 	};
 	pwm11 {
+		/omit-if-no-ref/
 		pwm11m0_pins: pwm11m0-pins {
 			rockchip,pins =
 				/* pwm11_ir_m0 */
 				<3 RK_PA7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm11m1_pins: pwm11m1-pins {
 			rockchip,pins =
 				/* pwm11_ir_m1 */
@@ -777,11 +880,13 @@
 		};
 	};
 	pwm2 {
+		/omit-if-no-ref/
 		pwm2m0_pins: pwm2m0-pins {
 			rockchip,pins =
 				/* pwm2_m0 */
 				<0 RK_PC0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm2m1_pins: pwm2m1-pins {
 			rockchip,pins =
 				/* pwm2_m1 */
@@ -789,11 +894,13 @@
 		};
 	};
 	pwm3 {
+		/omit-if-no-ref/
 		pwm3m0_pins: pwm3m0-pins {
 			rockchip,pins =
 				/* pwm3_ir_m0 */
 				<0 RK_PC1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm3m1_pins: pwm3m1-pins {
 			rockchip,pins =
 				/* pwm3_ir_m1 */
@@ -801,11 +908,13 @@
 		};
 	};
 	pwm4 {
+		/omit-if-no-ref/
 		pwm4m0_pins: pwm4m0-pins {
 			rockchip,pins =
 				/* pwm4_m0 */
 				<0 RK_PC2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm4m1_pins: pwm4m1-pins {
 			rockchip,pins =
 				/* pwm4_m1 */
@@ -813,11 +922,13 @@
 		};
 	};
 	pwm5 {
+		/omit-if-no-ref/
 		pwm5m0_pins: pwm5m0-pins {
 			rockchip,pins =
 				/* pwm5_m0 */
 				<0 RK_PC3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm5m1_pins: pwm5m1-pins {
 			rockchip,pins =
 				/* pwm5_m1 */
@@ -825,11 +936,13 @@
 		};
 	};
 	pwm6 {
+		/omit-if-no-ref/
 		pwm6m0_pins: pwm6m0-pins {
 			rockchip,pins =
 				/* pwm6_m0 */
 				<0 RK_PB2 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm6m1_pins: pwm6m1-pins {
 			rockchip,pins =
 				/* pwm6_m1 */
@@ -837,11 +950,13 @@
 		};
 	};
 	pwm7 {
+		/omit-if-no-ref/
 		pwm7m0_pins: pwm7m0-pins {
 			rockchip,pins =
 				/* pwm7_ir_m0 */
 				<0 RK_PB1 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm7m1_pins: pwm7m1-pins {
 			rockchip,pins =
 				/* pwm7_ir_m1 */
@@ -849,11 +964,13 @@
 		};
 	};
 	pwm8 {
+		/omit-if-no-ref/
 		pwm8m0_pins: pwm8m0-pins {
 			rockchip,pins =
 				/* pwm8_m0 */
 				<3 RK_PA4 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm8m1_pins: pwm8m1-pins {
 			rockchip,pins =
 				/* pwm8_m1 */
@@ -861,11 +978,13 @@
 		};
 	};
 	pwm9 {
+		/omit-if-no-ref/
 		pwm9m0_pins: pwm9m0-pins {
 			rockchip,pins =
 				/* pwm9_m0 */
 				<3 RK_PA5 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		pwm9m1_pins: pwm9m1-pins {
 			rockchip,pins =
 				/* pwm9_m1 */
@@ -873,6 +992,7 @@
 		};
 	};
 	rgmii {
+		/omit-if-no-ref/
 		rgmiim0_pins: rgmiim0-pins {
 			rockchip,pins =
 				/* rgmii_clk_m0 */
@@ -912,6 +1032,7 @@
 				/* rgmii_txen_m0 */
 				<3 RK_PB5 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		rgmiim1_pins: rgmiim1-pins {
 			rockchip,pins =
 				/* rgmii_clk_m1 */
@@ -953,6 +1074,7 @@
 		};
 	};
 	sdmmc0 {
+		/omit-if-no-ref/
 		sdmmc0_bus4: sdmmc0-bus4 {
 			rockchip,pins =
 				/* sdmmc0_d0 */
@@ -964,26 +1086,31 @@
 				/* sdmmc0_d3 */
 				<1 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_clk: sdmmc0-clk {
 			rockchip,pins =
 				/* sdmmc0_clk */
 				<1 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_cmd: sdmmc0-cmd {
 			rockchip,pins =
 				/* sdmmc0_cmd */
 				<1 RK_PB1 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_det: sdmmc0-det {
 			rockchip,pins =
 				<0 RK_PA3 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		sdmmc0_pwr: sdmmc0-pwr {
 			rockchip,pins =
 				<0 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
 	sdmmc1 {
+		/omit-if-no-ref/
 		sdmmc1_bus4: sdmmc1-bus4 {
 			rockchip,pins =
 				/* sdmmc1_d0 */
@@ -995,190 +1122,234 @@
 				/* sdmmc1_d3 */
 				<1 RK_PB7 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_clk: sdmmc1-clk {
 			rockchip,pins =
 				/* sdmmc1_clk */
 				<1 RK_PB2 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_cmd: sdmmc1-cmd {
 			rockchip,pins =
 				/* sdmmc1_cmd */
 				<1 RK_PB3 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_det: sdmmc1-det {
 			rockchip,pins =
 				<1 RK_PD0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		sdmmc1_pwr: sdmmc1-pwr {
 			rockchip,pins =
 				<1 RK_PD1 2 &pcfg_pull_none>;
 		};
 	};
 	spi0 {
+		/omit-if-no-ref/
 		spi0m0_clk: spi0m0-clk {
 			rockchip,pins =
 				<0 RK_PB0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_cs0n: spi0m0-cs0n {
 			rockchip,pins =
 				<0 RK_PA5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_cs1n: spi0m0-cs1n {
 			rockchip,pins =
 				<0 RK_PA4 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_miso: spi0m0-miso {
 			rockchip,pins =
 				<0 RK_PA7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_mosi: spi0m0-mosi {
 			rockchip,pins =
 				<0 RK_PA6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m0_clk_hs: spi0m0-clk_hs {
 			rockchip,pins =
 				<0 RK_PB0 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		spi0m0_miso_hs: spi0m0-miso_hs {
 			rockchip,pins =
 				<0 RK_PA7 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		spi0m0_mosi_hs: spi0m0-mosi_hs {
 			rockchip,pins =
 				<0 RK_PA6 1 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		spi0m1_clk: spi0m1-clk {
 			rockchip,pins =
 				<2 RK_PA1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_cs0n: spi0m1-cs0n {
 			rockchip,pins =
 				<2 RK_PA0 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_cs1n: spi0m1-cs1n {
 			rockchip,pins =
 				<1 RK_PD5 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_miso: spi0m1-miso {
 			rockchip,pins =
 				<1 RK_PD7 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m1_mosi: spi0m1-mosi {
 			rockchip,pins =
 				<1 RK_PD6 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_clk: spi0m2-clk {
 			rockchip,pins =
 				<2 RK_PB2 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_cs0n: spi0m2-cs0n {
 			rockchip,pins =
 				<2 RK_PA7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_cs1n: spi0m2-cs1n {
 			rockchip,pins =
 				<2 RK_PB3 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_miso: spi0m2-miso {
 			rockchip,pins =
 				<2 RK_PB1 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi0m2_mosi: spi0m2-mosi {
 			rockchip,pins =
 				<2 RK_PB0 6 &pcfg_pull_none>;
 		};
 	};
 	spi1 {
+		/omit-if-no-ref/
 		spi1m0_clk: spi1m0-clk {
 			rockchip,pins =
 				<3 RK_PC0 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_cs0n: spi1m0-cs0n {
 			rockchip,pins =
 				<3 RK_PB5 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_cs1n: spi1m0-cs1n {
 			rockchip,pins =
 				<3 RK_PB4 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_miso: spi1m0-miso {
 			rockchip,pins =
 				<3 RK_PB7 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_mosi: spi1m0-mosi {
 			rockchip,pins =
 				<3 RK_PB6 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m0_clk_hs: spi1m0-clk_hs {
 			rockchip,pins =
 				<3 RK_PC0 5 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		spi1m0_miso_hs: spi1m0-miso_hs {
 			rockchip,pins =
 				<3 RK_PB7 5 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		spi1m0_mosi_hs: spi1m0-mosi_hs {
 			rockchip,pins =
 				<3 RK_PB6 5 &pcfg_pull_up_drv_level_2>;
 		};
+		/omit-if-no-ref/
 		spi1m1_clk: spi1m1-clk {
 			rockchip,pins =
 				<1 RK_PC6 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_cs0n: spi1m1-cs0n {
 			rockchip,pins =
 				<1 RK_PC7 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_cs1n: spi1m1-cs1n {
 			rockchip,pins =
 				<1 RK_PD0 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_miso: spi1m1-miso {
 			rockchip,pins =
 				<1 RK_PC5 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m1_mosi: spi1m1-mosi {
 			rockchip,pins =
 				<1 RK_PC4 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_clk: spi1m2-clk {
 			rockchip,pins =
 				<2 RK_PD5 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_cs0n: spi1m2-cs0n {
 			rockchip,pins =
 				<2 RK_PD4 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_cs1n: spi1m2-cs1n {
 			rockchip,pins =
 				<3 RK_PA0 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_miso: spi1m2-miso {
 			rockchip,pins =
 				<2 RK_PD7 6 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		spi1m2_mosi: spi1m2-mosi {
 			rockchip,pins =
 				<2 RK_PD6 6 &pcfg_pull_none>;
 		};
 	};
 	tsadc {
+		/omit-if-no-ref/
 		tsadcm0_pins: tsadcm0-pins {
 			rockchip,pins =
 				/* tsadc_shut_m0 */
 				<0 RK_PA1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		tsadcm1_pins: tsadcm1-pins {
 			rockchip,pins =
 				/* tsadc_shut_m1 */
 				<0 RK_PB2 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		tsadc_shutorg: tsadc-shutorg {
 			rockchip,pins =
 				<0 RK_PA1 2 &pcfg_pull_none>;
 		};
 	};
 	uart0 {
+		/omit-if-no-ref/
 		uart0_xfer: uart0-xfer {
 			rockchip,pins =
 				/* uart0_rx */
@@ -1186,16 +1357,19 @@
 				/* uart0_tx */
 				<1 RK_PC3 1 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart0_ctsn: uart0-ctsn {
 			rockchip,pins =
 				<1 RK_PC1 1 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart0_rtsn: uart0-rtsn {
 			rockchip,pins =
 				<1 RK_PC0 1 &pcfg_pull_none>;
 		};
 	};
 	uart1 {
+		/omit-if-no-ref/
 		uart1m0_xfer: uart1m0-xfer {
 			rockchip,pins =
 				/* uart1_rx_m0 */
@@ -1203,14 +1377,17 @@
 				/* uart1_tx_m0 */
 				<0 RK_PB6 2 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart1m0_ctsn: uart1m0-ctsn {
 			rockchip,pins =
 				<0 RK_PC1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart1m0_rtsn: uart1m0-rtsn {
 			rockchip,pins =
 				<0 RK_PC0 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart1m1_xfer: uart1m1-xfer {
 			rockchip,pins =
 				/* uart1_rx_m1 */
@@ -1218,16 +1395,19 @@
 				/* uart1_tx_m1 */
 				<1 RK_PD0 5 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart1m1_ctsn: uart1m1-ctsn {
 			rockchip,pins =
 				<1 RK_PC7 5 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart1m1_rtsn: uart1m1-rtsn {
 			rockchip,pins =
 				<1 RK_PC6 5 &pcfg_pull_none>;
 		};
 	};
 	uart2 {
+		/omit-if-no-ref/
 		uart2m0_xfer: uart2m0-xfer {
 			rockchip,pins =
 				/* uart2_rx_m0 */
@@ -1235,6 +1415,7 @@
 				/* uart2_tx_m0 */
 				<1 RK_PA5 3 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart2m1_xfer: uart2m1-xfer {
 			rockchip,pins =
 				/* uart2_rx_m1 */
@@ -1244,6 +1425,7 @@
 		};
 	};
 	uart3 {
+		/omit-if-no-ref/
 		uart3m0_xfer: uart3m0-xfer {
 			rockchip,pins =
 				/* uart3_rx_m0 */
@@ -1251,14 +1433,17 @@
 				/* uart3_tx_m0 */
 				<3 RK_PC6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart3m0_ctsn: uart3m0-ctsn {
 			rockchip,pins =
 				<3 RK_PC5 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3m0_rtsn: uart3m0-rtsn {
 			rockchip,pins =
 				<3 RK_PC4 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3m1_xfer: uart3m1-xfer {
 			rockchip,pins =
 				/* uart3_rx_m1 */
@@ -1266,6 +1451,7 @@
 				/* uart3_tx_m1 */
 				<1 RK_PA7 2 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart3m2_xfer: uart3m2-xfer {
 			rockchip,pins =
 				/* uart3_rx_m2 */
@@ -1273,24 +1459,29 @@
 				/* uart3_tx_m2 */
 				<3 RK_PA0 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart3m2_ctsn: uart3m2-ctsn {
 			rockchip,pins =
 				<2 RK_PD7 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3m2_rtsn: uart3m2-rtsn {
 			rockchip,pins =
 				<2 RK_PD6 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3_ctsn: uart3-ctsn {
 			rockchip,pins =
 				<1 RK_PB1 2 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart3_rtsn: uart3-rtsn {
 			rockchip,pins =
 				<1 RK_PB0 2 &pcfg_pull_none>;
 		};
 	};
 	uart4 {
+		/omit-if-no-ref/
 		uart4m0_xfer: uart4m0-xfer {
 			rockchip,pins =
 				/* uart4_rx_m0 */
@@ -1298,14 +1489,17 @@
 				/* uart4_tx_m0 */
 				<3 RK_PA4 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart4m0_ctsn: uart4m0-ctsn {
 			rockchip,pins =
 				<3 RK_PB3 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m0_rtsn: uart4m0-rtsn {
 			rockchip,pins =
 				<3 RK_PB2 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m1_xfer: uart4m1-xfer {
 			rockchip,pins =
 				/* uart4_rx_m1 */
@@ -1313,14 +1507,17 @@
 				/* uart4_tx_m1 */
 				<2 RK_PA6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart4m1_ctsn: uart4m1-ctsn {
 			rockchip,pins =
 				<2 RK_PA5 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m1_rtsn: uart4m1-rtsn {
 			rockchip,pins =
 				<2 RK_PA4 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m2_xfer: uart4m2-xfer {
 			rockchip,pins =
 				/* uart4_rx_m2 */
@@ -1328,16 +1525,19 @@
 				/* uart4_tx_m2 */
 				<1 RK_PD5 3 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart4m2_ctsn: uart4m2-ctsn {
 			rockchip,pins =
 				<1 RK_PD3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart4m2_rtsn: uart4m2-rtsn {
 			rockchip,pins =
 				<1 RK_PD2 3 &pcfg_pull_none>;
 		};
 	};
 	uart5 {
+		/omit-if-no-ref/
 		uart5m0_xfer: uart5m0-xfer {
 			rockchip,pins =
 				/* uart5_rx_m0 */
@@ -1345,14 +1545,17 @@
 				/* uart5_tx_m0 */
 				<3 RK_PA6 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart5m0_ctsn: uart5m0-ctsn {
 			rockchip,pins =
 				<3 RK_PB1 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m0_rtsn: uart5m0-rtsn {
 			rockchip,pins =
 				<3 RK_PB0 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m1_xfer: uart5m1-xfer {
 			rockchip,pins =
 				/* uart5_rx_m1 */
@@ -1360,14 +1563,17 @@
 				/* uart5_tx_m1 */
 				<2 RK_PB0 4 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart5m1_ctsn: uart5m1-ctsn {
 			rockchip,pins =
 				<2 RK_PB3 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m1_rtsn: uart5m1-rtsn {
 			rockchip,pins =
 				<2 RK_PB2 4 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m2_xfer: uart5m2-xfer {
 			rockchip,pins =
 				/* uart5_rx_m2 */
@@ -1375,10 +1581,12 @@
 				/* uart5_tx_m2 */
 				<2 RK_PA0 3 &pcfg_pull_up>;
 		};
+		/omit-if-no-ref/
 		uart5m2_ctsn: uart5m2-ctsn {
 			rockchip,pins =
 				<2 RK_PA3 3 &pcfg_pull_none>;
 		};
+		/omit-if-no-ref/
 		uart5m2_rtsn: uart5m2-rtsn {
 			rockchip,pins =
 				<2 RK_PA2 3 &pcfg_pull_none>;