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audio: add clk tuning_enable/start_enable control in dts [1/1]

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PD#SWPL-8306

Problem:
speaker without audio on S400. sideeffect of SWPL-7680

Solution:
add control interface in dts to enable clk tuning
and start clk before codec init

Verify:
verify on S400

Change-Id: Ic9f4e7b13b7d4ced18852346cdc7cf5f48e510dc
Signed-off-by: Zhe Wang <Zhe.Wang@amlogic.com>
This commit is contained in:
Zhe Wang
2019-05-14 14:14:11 +08:00
committed by Tao Zeng
parent 59ab3a0599
commit 0504a9aec9
26 changed files with 235 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1154,6 +1154,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1243,6 +1249,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -1162,6 +1162,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1251,6 +1257,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout>; /* bob remove &spdifin*/
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -1162,6 +1162,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1251,6 +1257,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout>;/* bob remove &spdifin*/
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm/boot/dts/amlogic/sm1_s905d3_skt.dts
View File

@@ -1162,6 +1162,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <0>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1251,6 +1257,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm/boot/dts/amlogic/sm1_s905x3_ac213.dts
View File

@@ -1090,6 +1090,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1178,6 +1184,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

7
arch/arm/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -1312,6 +1312,11 @@
acodec_adc = <1>;
mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1444,6 +1449,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

7
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -1366,6 +1366,11 @@
acodec_adc = <1>;
mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1498,6 +1503,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

9
arch/arm/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
View File

@@ -1361,6 +1361,12 @@
acodec_adc = <1>;
mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1493,6 +1499,9 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm/boot/dts/amlogic/tm2_t962e2_ab311.dts
View File

@@ -1374,7 +1374,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1527,6 +1531,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm/boot/dts/amlogic/tm2_t962e2_ab319.dts
View File

@@ -1311,7 +1311,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1461,6 +1465,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts
View File

@@ -1378,7 +1378,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1532,6 +1536,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts
View File

@@ -1312,7 +1312,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1462,6 +1466,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

9
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1151,6 +1151,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1240,6 +1246,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout /* &spdifin */>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -1159,6 +1159,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1248,6 +1254,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout /* &spdifin */>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -1159,6 +1159,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1248,6 +1254,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout /* &spdifin */>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm64/boot/dts/amlogic/sm1_s905d3_skt.dts
View File

@@ -1160,6 +1160,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <0>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1249,6 +1255,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

9
arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213.dts
View File

@@ -1167,6 +1167,12 @@
*/
samesource_sel = <3>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
@@ -1254,6 +1260,9 @@
pinctrl-names = "spdif_pins";
pinctrl-0 = <&spdifout &spdifin>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};
spdifb: spdif@1 {

7
arch/arm64/boot/dts/amlogic/tl1_t962x2_t309.dts
View File

@@ -1310,6 +1310,11 @@
acodec_adc = <1>;
mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1442,6 +1447,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

7
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_1g.dts
View File

@@ -1361,6 +1361,11 @@
acodec_adc = <1>;
mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1493,6 +1498,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

7
arch/arm64/boot/dts/amlogic/tl1_t962x2_x301_2g.dts
View File

@@ -1355,6 +1355,11 @@
acodec_adc = <1>;
mclk_pad = <0>; /* 0: mclk_0; 1: mclk_1 */
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1487,6 +1492,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts
View File

@@ -1369,7 +1369,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1522,6 +1526,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab319.dts
View File

@@ -1310,6 +1310,10 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
@@ -1460,6 +1464,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts
View File

@@ -1374,7 +1374,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1528,6 +1532,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

6
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts
View File

@@ -1311,7 +1311,11 @@
/* In for ACODEC_ADC */
acodec_adc = <1>;
/*enable default mclk(12.288M), before extern codec start*/
start_clk_enable = <1>;
/*tdm clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
/* !!!For --TV platform-- ONLY */
@@ -1461,6 +1465,8 @@
asrc_id = <0>;
auto_asrc = <3>;
/*spdif clk tuning enable*/
clk_tuning_enable = <1>;
status = "okay";
};

21
sound/soc/amlogic/auge/spdif.c
View File

@@ -114,6 +114,7 @@ struct aml_spdif {
/* mixer control vals */
bool mute;
enum SPDIF_SRC spdifin_src;
int clk_tuning_enable;
};
static const struct snd_pcm_hardware aml_spdif_hardware = {
@@ -400,7 +401,9 @@ static const struct snd_kcontrol_new snd_spdif_controls[] = {
0, aml_get_hdmi_out_audio,
aml_set_hdmi_out_audio),
#endif
};
static const struct snd_kcontrol_new snd_spdif_clk_controls[] = {
SOC_SINGLE_EXT("SPDIF CLK Fine Setting",
0, 0, 2000000, 0,
spdif_clk_get,
@@ -985,6 +988,15 @@ static int aml_dai_spdif_probe(struct snd_soc_dai *cpu_dai)
pr_err("%s, failed add snd spdif controls\n", __func__);
}
if (p_spdif->clk_tuning_enable == 1) {
ret = snd_soc_add_dai_controls(cpu_dai,
snd_spdif_clk_controls,
ARRAY_SIZE(snd_spdif_clk_controls));
if (ret < 0)
pr_err("%s, failed add snd spdif clk controls\n",
__func__);
}
return 0;
}
@@ -1511,6 +1523,15 @@ static int aml_spdif_parse_of(struct platform_device *pdev)
return PTR_ERR(p_spdif->clk_spdifout);
}
ret = of_property_read_u32(pdev->dev.of_node,
"clk_tuning_enable",
&p_spdif->clk_tuning_enable);
if (ret < 0)
p_spdif->clk_tuning_enable = 0;
else
pr_info("Spdif id %d tuning clk enable:%d\n",
p_spdif->id, p_spdif->clk_tuning_enable);
return 0;
}

38
sound/soc/amlogic/auge/tdm.c
View File

@@ -110,6 +110,8 @@ struct aml_tdm {
/* tdmin_lb src sel */
int tdmin_lb_src;
int start_clk_enable;
int clk_tuning_enable;
};
static const struct snd_pcm_hardware aml_tdm_hardware = {
@@ -199,21 +201,19 @@ static const struct soc_enum i2sin_clk_enum[] = {
i2sin_clk),
};
static const struct snd_kcontrol_new snd_tdm_controls[] = {
SOC_ENUM_EXT("I2SIn CLK", i2sin_clk_enum,
tdmin_clk_get,
NULL),
};
static const struct snd_kcontrol_new snd_tdm_clk_controls[] = {
SOC_SINGLE_EXT("TDM MCLK Fine Setting",
0, 0, 2000000, 0,
tdm_clk_get,
tdm_clk_set),
};
static irqreturn_t aml_tdm_ddr_isr(int irq, void *devid)
{
struct snd_pcm_substream *substream = (struct snd_pcm_substream *)devid;
@@ -1283,7 +1283,16 @@ static int aml_dai_tdm_probe(struct snd_soc_dai *cpu_dai)
ret = snd_soc_add_dai_controls(cpu_dai, snd_tdm_controls,
ARRAY_SIZE(snd_tdm_controls));
if (ret < 0)
pr_err("%s, failed add snd spdif controls\n", __func__);
pr_err("%s, failed add snd tdm controls\n", __func__);
if (p_tdm->clk_tuning_enable == 1) {
ret = snd_soc_add_dai_controls(cpu_dai,
snd_tdm_clk_controls,
ARRAY_SIZE(snd_tdm_clk_controls));
if (ret < 0)
pr_err("%s, failed add snd tdm clk controls\n",
__func__);
}
/* config ddr arb */
aml_tdm_arb_config(p_tdm->actrl);
@@ -1665,8 +1674,17 @@ static int aml_tdm_platform_probe(struct platform_device *pdev)
/*return PTR_ERR(p_tdm->pin_ctl);*/
}
ret = of_property_read_u32(node, "start_clk_enable",
&p_tdm->start_clk_enable);
if (ret < 0)
p_tdm->start_clk_enable = 0;
else
pr_info("TDM id %d output clk enable:%d\n",
p_tdm->id, p_tdm->start_clk_enable);
/*set default clk for output*/
aml_set_default_tdm_clk(p_tdm);
if (p_tdm->start_clk_enable == 1)
aml_set_default_tdm_clk(p_tdm);
/* mclk pad ctrl */
ret = of_property_read_u32(node, "mclk_pad",
@@ -1690,6 +1708,14 @@ static int aml_tdm_platform_probe(struct platform_device *pdev)
return ret;
}
ret = of_property_read_u32(node, "clk_tuning_enable",
&p_tdm->clk_tuning_enable);
if (ret < 0)
p_tdm->clk_tuning_enable = 0;
else
pr_info("TDM id %d tuning clk enable:%d\n",
p_tdm->id, p_tdm->clk_tuning_enable);
return devm_snd_soc_register_platform(dev, &aml_tdm_platform);
}