From 053d015d34cf955d196aed34e7c3082e81076eea Mon Sep 17 00:00:00 2001
From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Fri, 16 Dec 2022 18:58:27 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s: set spdif2\5 to 12M by default

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I49eda13a3122e25eae362c943a2e1973ac1babf8
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 7b8a061277de..625754d0c3c1 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -2299,7 +2299,8 @@
 			<&cru ACLK_LOW_TOP_ROOT>, <&cru PCLK_PMU0_ROOT>,
 			<&cru HCLK_PMU_CM0_ROOT>,
 			<&cru ACLK_BUS_ROOT>, <&cru CLK_150M_SRC>,
-			<&cru CLK_GPU>;
+			<&cru CLK_GPU>, <&cru CLK_SPDIF2_DP0>,
+			<&cru CLK_SPDIF5_DP1>;
 		assigned-clock-rates =
 			<1100000000>, <786432000>,
 			<850000000>, <1188000000>,
@@ -2309,7 +2310,8 @@
 			<400000000>, <100000000>,
 			<200000000>,
 			<375000000>, <150000000>,
-			<200000000>;
+			<200000000>, <12000000>,
+			<12000000>;
 	};
 
 	i2c0: i2c@fd880000 {