From 5147d5bfddc807e990a762aed0e56724afeda663 Mon Sep 17 00:00:00 2001 From: Joy Chakraborty Date: Thu, 27 Apr 2023 12:33:10 +0000 Subject: [PATCH 1/2] spi: dw: Add 32 bpw support to SPI DW DMA driver Add Support for AxSize = 4 bytes configuration from dw dma driver if n_bytes i.e. number of bytes per write to fifo is 4. Number of bytes written to fifo per write is depended on the bits/word configuration being used which the DW core driver translates to n_bytes. Hence, for bits per word values between 17 and 32 n_bytes should be equal to 4. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty Date: Thu, 27 Apr 2023 12:33:11 +0000 Subject: [PATCH 2/2] spi: dw: Move dw_spi_can_dma() Move dw_spi_can_dma() implementation below dw_spi_dma_convert_width() for handing compile dependency in future patches. * tested on Baikal-T1 based system with DW SPI-looped back interface transferring a chunk of data with DFS:8,12,16. Signed-off-by: Joy Chakraborty len > dws->fifo_len; -} - static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) { switch (n_bytes) { @@ -220,6 +212,14 @@ static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes) } } +static bool dw_spi_can_dma(struct spi_controller *master, + struct spi_device *spi, struct spi_transfer *xfer) +{ + struct dw_spi *dws = spi_controller_get_devdata(master); + + return xfer->len > dws->fifo_len; +} + static int dw_spi_dma_wait(struct dw_spi *dws, unsigned int len, u32 speed) { unsigned long long ms;