From 06622a5859c27cd60b47f4425ba1ecc840549fc2 Mon Sep 17 00:00:00 2001 From: Yu Qiaowei Date: Thu, 3 Mar 2022 21:01:49 +0800 Subject: [PATCH] video: rockchip: rga3: support Yin_Yout mode Signed-off-by: Yu Qiaowei Change-Id: Ia94e4e58575eabcc122390ad126a1c5d9e6f468e --- drivers/video/rockchip/rga3/include/rga.h | 2 ++ .../rockchip/rga3/include/rga2_reg_info.h | 2 -- .../video/rockchip/rga3/include/rga_common.h | 1 + drivers/video/rockchip/rga3/rga2_reg_info.c | 21 ++++++++++++++----- drivers/video/rockchip/rga3/rga_common.c | 11 ++++++++++ 5 files changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/video/rockchip/rga3/include/rga.h b/drivers/video/rockchip/rga3/include/rga.h index ab664f6604ef..ff18e2589670 100644 --- a/drivers/video/rockchip/rga3/include/rga.h +++ b/drivers/video/rockchip/rga3/include/rga.h @@ -624,6 +624,8 @@ struct rga2_req { /* RGA2 1106 add */ struct rga_mosaic_info mosaic_info; + + uint8_t yin_yout_en; }; struct rga3_req { diff --git a/drivers/video/rockchip/rga3/include/rga2_reg_info.h b/drivers/video/rockchip/rga3/include/rga2_reg_info.h index ac9227343fcd..682d42f8e459 100644 --- a/drivers/video/rockchip/rga3/include/rga2_reg_info.h +++ b/drivers/video/rockchip/rga3/include/rga2_reg_info.h @@ -356,8 +356,6 @@ int rga2_gen_reg_info(unsigned char *base, unsigned char *csc_base, struct rga2_req *msg); -void rga_cmd_to_rga2_cmd(struct rga_req *req_rga, struct rga2_req *req); - void rga2_soft_reset(struct rga_scheduler_t *scheduler); int rga2_set_reg(struct rga_job *job, struct rga_scheduler_t *scheduler); int rga2_init_reg(struct rga_job *job); diff --git a/drivers/video/rockchip/rga3/include/rga_common.h b/drivers/video/rockchip/rga3/include/rga_common.h index ae5399618e4b..9c93c4483489 100644 --- a/drivers/video/rockchip/rga3/include/rga_common.h +++ b/drivers/video/rockchip/rga3/include/rga_common.h @@ -17,6 +17,7 @@ bool rga_is_yuv422_packed_format(uint32_t format); bool rga_is_yuv8bit_format(uint32_t format); bool rga_is_yuv10bit_format(uint32_t format); bool rga_is_yuv422p_format(uint32_t format); +bool rga_is_only_y_format(uint32_t format); int rga_get_format_bits(uint32_t format); diff --git a/drivers/video/rockchip/rga3/rga2_reg_info.c b/drivers/video/rockchip/rga3/rga2_reg_info.c index d092806111c7..a4058f66f30b 100644 --- a/drivers/video/rockchip/rga3/rga2_reg_info.c +++ b/drivers/video/rockchip/rga3/rga2_reg_info.c @@ -11,6 +11,7 @@ #include "rga2_reg_info.h" #include "rga2_mmu_info.h" #include "rga_common.h" +#include "rga_hw_config.h" extern struct rga2_mmu_info_t rga2_mmu_info; @@ -189,6 +190,9 @@ static void RGA2_set_mode_ctrl(u8 *base, struct rga2_req *msg) reg = ((reg & (~m_RGA2_MODE_CTRL_SW_MOSAIC_EN)) | (s_RGA2_MODE_CTRL_SW_MOSAIC_EN(msg->mosaic_info.enable))); + reg = ((reg & (~m_RGA2_MODE_CTRL_SW_YIN_YOUT_EN)) | + (s_RGA2_MODE_CTRL_SW_YIN_YOUT_EN(msg->yin_yout_en))); + *bRGA_MODE_CTL = reg; } @@ -201,7 +205,7 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg) u32 *bRGA_MASK_ADDR; u32 *bRGA_SRC_TR_COLOR0, *bRGA_SRC_TR_COLOR1; - u8 src_fmt_yuv400_en = 0; + u8 disable_uv_channel_en = 0; u32 reg = 0; u8 src0_format = 0; @@ -492,7 +496,8 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg) case RGA_FORMAT_YCbCr_400: src0_format = 0x8; - src_fmt_yuv400_en = 1; + /* When Yin_Yout is enabled, no need to go through the software. */ + disable_uv_channel_en = msg->yin_yout_en ? false : true; xdiv = 1; ydiv = 1; break; @@ -558,7 +563,7 @@ static void RGA2_set_reg_src_info(u8 *base, struct rga2_req *msg) stride = (((msg->src.vir_w * pixel_width) + 3) & ~3) >> 2; uv_stride = ((msg->src.vir_w / xdiv + 3) & ~3); - if (src_fmt_yuv400_en == 1) { + if (disable_uv_channel_en == 1) { /* * When Y400 as the input format, because the current * RGA does not support closing @@ -1690,7 +1695,8 @@ int rga2_gen_reg_info(u8 *base, u8 *csc_base, struct rga2_req *msg) return 0; } -void rga_cmd_to_rga2_cmd(struct rga_req *req_rga, struct rga2_req *req) +static void rga_cmd_to_rga2_cmd(struct rga_scheduler_t *scheduler, + struct rga_req *req_rga, struct rga2_req *req) { u16 alpha_mode_0, alpha_mode_1; @@ -1826,6 +1832,11 @@ void rga_cmd_to_rga2_cmd(struct rga_req *req_rga, struct rga2_req *req) /* RGA2 1106 add */ memcpy(&req->mosaic_info, &req_rga->mosaic_info, sizeof(req_rga->mosaic_info)); + if ((scheduler->data->feature & RGA_YIN_YOUT) && + rga_is_only_y_format(req->src.format) && + rga_is_only_y_format(req->dst.format)) + req->yin_yout_en = true; + if (((req_rga->alpha_rop_flag) & 1)) { if ((req_rga->alpha_rop_flag >> 3) & 1) { /* porter duff alpha enable */ @@ -2137,7 +2148,7 @@ int rga2_init_reg(struct rga_job *job) memset(&req, 0x0, sizeof(req)); - rga_cmd_to_rga2_cmd(&job->rga_command_base, &req); + rga_cmd_to_rga2_cmd(scheduler, &job->rga_command_base, &req); /* check value if legal */ ret = rga2_check_param(&req); diff --git a/drivers/video/rockchip/rga3/rga_common.c b/drivers/video/rockchip/rga3/rga_common.c index a2a0d54c67ba..8c9fb0788c7d 100644 --- a/drivers/video/rockchip/rga3/rga_common.c +++ b/drivers/video/rockchip/rga3/rga_common.c @@ -173,6 +173,17 @@ bool rga_is_yuv422p_format(uint32_t format) } } +bool rga_is_only_y_format(uint32_t format) +{ + switch (format) { + case RGA_FORMAT_YCbCr_400: + case RGA_FORMAT_Y4: + return true; + default: + return false; + } +} + int rga_get_format_bits(uint32_t format) { int bits = 0;