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rk3168: update dvfs table

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chenxing
2013-03-26 14:49:00 +08:00
parent 97b827f7b1
commit 06cf5f8417
2 changed files with 68 additions and 53 deletions
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108
arch/arm/mach-rk30/board-rk3168-tb.c
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@@ -2278,93 +2278,107 @@ static void __init rk30_reserve(void)
* @cpu_volt : arm voltage depend on frequency
*/
#if defined(CONFIG_ARCH_RK3188)
//sdk
static struct cpufreq_frequency_table dvfs_arm_table_volt_level0[] = {
{.frequency = 312 * 1000, .index = 850 * 1000},
{.frequency = 504 * 1000, .index = 900 * 1000},
{.frequency = 816 * 1000, .index = 950 * 1000},
{.frequency = 1008 * 1000, .index = 1025 * 1000},
{.frequency = 1200 * 1000, .index = 1100 * 1000},
{.frequency = 1416 * 1000, .index = 1200 * 1000},
{.frequency = 1608 * 1000, .index = 1300 * 1000},
{.frequency = CPUFREQ_TABLE_END},
{.frequency = 312 * 1000, .index = 850 * 1000},
{.frequency = 504 * 1000, .index = 900 * 1000},
{.frequency = 816 * 1000, .index = 950 * 1000},
{.frequency = 1008 * 1000, .index = 1025 * 1000},
{.frequency = 1200 * 1000, .index = 1100 * 1000},
{.frequency = 1416 * 1000, .index = 1200 * 1000},
{.frequency = 1608 * 1000, .index = 1300 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
//default
static struct cpufreq_frequency_table dvfs_arm_table_volt_level1[] = {
{.frequency = 312 * 1000, .index = 875 * 1000},
{.frequency = 504 * 1000, .index = 925 * 1000},
{.frequency = 816 * 1000, .index = 975 * 1000},
{.frequency = 1008 * 1000, .index = 1075 * 1000},
{.frequency = 1200 * 1000, .index = 1150 * 1000},
{.frequency = 1416 * 1000, .index = 1250 * 1000},
{.frequency = 1608 * 1000, .index = 1350 * 1000},
{.frequency = CPUFREQ_TABLE_END},
{.frequency = 312 * 1000, .index = 875 * 1000},
{.frequency = 504 * 1000, .index = 925 * 1000},
{.frequency = 816 * 1000, .index = 975 * 1000},
{.frequency = 1008 * 1000, .index = 1075 * 1000},
{.frequency = 1200 * 1000, .index = 1150 * 1000},
{.frequency = 1416 * 1000, .index = 1250 * 1000},
{.frequency = 1608 * 1000, .index = 1350 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
// cube 10'
static struct cpufreq_frequency_table dvfs_arm_table_volt_level2[] = {
{.frequency = 312 * 1000, .index = 900 * 1000},
{.frequency = 504 * 1000, .index = 925 * 1000},
{.frequency = 816 * 1000, .index = 1000 * 1000},
{.frequency = 1008 * 1000, .index = 1075 * 1000},
{.frequency = 1200 * 1000, .index = 1200 * 1000},
{.frequency = 1416 * 1000, .index = 1250 * 1000},
{.frequency = 1608 * 1000, .index = 1350 * 1000},
{.frequency = CPUFREQ_TABLE_END},
{.frequency = 312 * 1000, .index = 900 * 1000},
{.frequency = 504 * 1000, .index = 925 * 1000},
{.frequency = 816 * 1000, .index = 1000 * 1000},
{.frequency = 1008 * 1000, .index = 1075 * 1000},
{.frequency = 1200 * 1000, .index = 1200 * 1000},
{.frequency = 1416 * 1000, .index = 1250 * 1000},
{.frequency = 1608 * 1000, .index = 1350 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
//if you board is good for volt quality,select dvfs_arm_table_volt_level0
#define dvfs_arm_table dvfs_arm_table_volt_level1
/******************************** gpu dvfs frequency volt table **********************************/
//sdk
static struct cpufreq_frequency_table dvfs_gpu_table_volt_level0[] = {
#if defined(CONFIG_ARCH_RK3188)
{.frequency = 133 * 1000, .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
#elif defined(CONFIG_ARCH_RK3066B)
{.frequency = 100 * 1000, .index = 950 * 1000},//the minimum rate is no limit for rk3168 rk3066B
#endif
{.frequency = 133 * 1000, .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
{.frequency = 200 * 1000, .index = 975 * 1000},
{.frequency = 266 * 1000, .index = 1000 * 1000},
{.frequency = 300 * 1000, .index = 1050 * 1000},
{.frequency = 400 * 1000, .index = 1100 * 1000},
{.frequency = 600 * 1000, .index = 1200 * 1000},
{.frequency = CPUFREQ_TABLE_END},
{.frequency = CPUFREQ_TABLE_END},
};
//cube 10'
static struct cpufreq_frequency_table dvfs_gpu_table_volt_level1[] = {
#if defined(CONFIG_ARCH_RK3188)
{.frequency = 133 * 1000, .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
#elif defined(CONFIG_ARCH_RK3066B)
{.frequency = 100 * 1000, .index = 950 * 1000},//the minimum rate is no limit for rk3168 rk3066B
#endif
{.frequency = 133 * 1000, .index = 975 * 1000},//the mininum rate is limited 133M for rk3188
{.frequency = 200 * 1000, .index = 1000 * 1000},
{.frequency = 266 * 1000, .index = 1025 * 1000},
{.frequency = 300 * 1000, .index = 1050 * 1000},
{.frequency = 400 * 1000, .index = 1100 * 1000},
{.frequency = 600 * 1000, .index = 1250 * 1000},
{.frequency = CPUFREQ_TABLE_END},
{.frequency = CPUFREQ_TABLE_END},
};
#define dvfs_gpu_table dvfs_gpu_table_volt_level1
/******************************** ddr dvfs frequency volt table **********************************/
static struct cpufreq_frequency_table dvfs_ddr_table_volt_level0[] = {
#if defined(CONFIG_ARCH_RK3188)
{.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 950 * 1000},
{.frequency = 300 * 1000 + DDR_FREQ_VIDEO, .index = 1000 * 1000},
#endif
{.frequency = 396 * 1000 + DDR_FREQ_NORMAL, .index = 1100 * 1000},
//{.frequency = 528 * 1000 + DDR_FREQ_NORMAL, .index = 1200 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
//if you board is good for volt quality,select dvfs_arm_table_volt_level0
#define dvfs_arm_table dvfs_arm_table_volt_level1
#define dvfs_gpu_table dvfs_gpu_table_volt_level1
#define dvfs_ddr_table dvfs_ddr_table_volt_level0
#else
//for RK3168 && RK3066B
static struct cpufreq_frequency_table dvfs_arm_table[] = {
{.frequency = 312 * 1000, .index = 950 * 1000},
{.frequency = 504 * 1000, .index = 1000 * 1000},
{.frequency = 816 * 1000, .index = 1050 * 1000},
{.frequency = 1008 * 1000, .index = 1125 * 1000},
{.frequency = 1200 * 1000, .index = 1200 * 1000},
//{.frequency = 1416 * 1000, .index = 1250 * 1000},
//{.frequency = 1608 * 1000, .index = 1300 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_gpu_table[] = {
{.frequency = 100 * 1000, .index = 1000 * 1000},
{.frequency = 200 * 1000, .index = 1000 * 1000},
{.frequency = 266 * 1000, .index = 1050 * 1000},
//{.frequency = 300 * 1000, .index = 1050 * 1000},
{.frequency = 400 * 1000, .index = 1125 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
static struct cpufreq_frequency_table dvfs_ddr_table[] = {
{.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000},
{.frequency = 300 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000},
{.frequency = 400 * 1000 + DDR_FREQ_NORMAL, .index = 1100 * 1000},
{.frequency = CPUFREQ_TABLE_END},
};
#endif
/******************************** arm dvfs frequency volt table end **********************************/
//#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table))
//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE];
//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];

13
arch/arm/mach-rk30/include/mach/board.h
View File

@@ -76,15 +76,16 @@ enum _codec_pll {
#if (RK30_CLOCKS_DEFAULT_FLAGS&CLK_FLG_UART_1_3M)
#define codec_pll_default codec_pll_768mhz
#else
#ifdef CONFIG_ARCH_RK3066B
#define codec_pll_default codec_pll_798mhz
#else
#define codec_pll_default codec_pll_1200mhz
#endif
#endif
#define periph_pll_default periph_pll_297mhz
#endif
#endif