From 07de89a542707f5e0a960a2adb819bc4a1c36dee Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Mon, 21 Mar 2022 10:47:38 +0800 Subject: [PATCH] drm/rockchip: vop2: aclk adjust only when have one active VP VP share same vop aclk, so only when have one active vp we can adjust aclk rate in psr mode. Signed-off-by: Sandy Huang Change-Id: I6c3ea84f5ab8a33d7c48e3c49c4426344e644a8a --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 91e6433870a7..148ac4da1d35 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -3705,9 +3705,11 @@ static void vop2_crtc_atomic_disable_for_psr(struct drm_crtc *crtc, vop2_disable_all_planes_for_crtc(crtc); drm_crtc_vblank_off(crtc); - vop2->aclk_rate = clk_get_rate(vop2->aclk); - clk_set_rate(vop2->aclk, vop2->aclk_rate / 3); - vop2->aclk_rate_reset = true; + if (hweight8(vop2->active_vp_mask) == 1) { + vop2->aclk_rate = clk_get_rate(vop2->aclk); + clk_set_rate(vop2->aclk, vop2->aclk_rate / 3); + vop2->aclk_rate_reset = true; + } } static void vop2_crtc_atomic_disable(struct drm_crtc *crtc,