From 092cfaa84bee49d4993c3f7d93054eab0b48a20d Mon Sep 17 00:00:00 2001 From: Lin Huang Date: Thu, 11 Apr 2019 15:59:54 +0800 Subject: [PATCH] arm64: dts: rockchip: rk1808-compute: add rk1808-compute board support Change-Id: I6838f60b6cf95a4e7d7105cc4127536c9219349b Signed-off-by: Lin Huang --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk1808-compute-v10.dts | 16 ++ .../boot/dts/rockchip/rk1808-compute.dtsi | 209 ++++++++++++++++++ 3 files changed, 226 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk1808-compute-v10.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk1808-compute.dtsi diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 5a8bd37ca537..01ee422005cf 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr4-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ext-rk618.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ext-rk618-avb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-z7-a0-rk618-dsi.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808-compute-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808-evb-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808-evb-x4.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk1808-evb-x4-second.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk1808-compute-v10.dts b/arch/arm64/boot/dts/rockchip/rk1808-compute-v10.dts new file mode 100644 index 000000000000..8133a0d5d8e5 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk1808-compute-v10.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include "rk1808-compute.dtsi" + +/ { + model = "Rockchip RK1808 compute V10 Board"; + compatible = "rockchip,rk1808-compute-v10", "rockchip,rk1808"; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 dump_initrd init=/init swiotlb=1 kpti=0"; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk1808-compute.dtsi b/arch/arm64/boot/dts/rockchip/rk1808-compute.dtsi new file mode 100644 index 000000000000..0ef997b851f5 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk1808-compute.dtsi @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + +#include +#include +#include +#include +#include +#include "rk1808.dtsi" + +/ { + model = "Rockchip RK1808 Compute stick"; + compatible = "rockchip,rk1808-compute", "rockchip,rk1808"; + + adc_key: adc-keys { + compatible = "adc-keys"; + autorepeat; + io-channels = <&saradc 2>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + }; + + i2c@0 { + compatible = "i2c-gpio"; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>, /* sda */ + <&gpio0 8 GPIO_ACTIVE_HIGH>; /* scl */ + i2c-gpio,delay-us = <2>; /* ~100 kHz */ + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_gpio>; + status = "okay"; + + vdd_npu: tcs4525@1c { + compatible = "tcs,tcs452x"; + reg = <0x1c>; + vin-supply = <&vcc5v0_sys>; + regulator-compatible = "fan53555-reg"; + pinctrl-names = "default"; + pinctrl-0 = <&en_gpio &vsel_gpio>; + vsel-gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; + regulator-name = "vdd_npu"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <2300>; + fcs,suspend-voltage-selector = <0>; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + }; + + fiq-debugger { + compatible = "rockchip,fiq-debugger"; + rockchip,serial-id = <2>; + rockchip,wake-irq = <0>; + /* If enable uart uses irq instead of fiq */ + rockchip,irq-mode-enable = <0>; + rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */ + interrupts = ; + status = "okay"; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + drm_logo: drm-logo@00000000 { + compatible = "rockchip,drm-logo"; + reg = <0x0 0x0 0x0 0x0>; + }; + + ramoops_mem: region@110000 { + reg = <0x0 0x110000 0x0 0xf0000>; + }; + }; + + ramoops: ramoops { + compatible = "ramoops"; + record-size = <0x0 0x30000>; + console-size = <0x0 0xc0000>; + ftrace-size = <0x0 0x00000>; + pmsg-size = <0x0 0x00000>; + memory-region = <&ramoops_mem>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vdd_cpu: vdd-cpu { + compatible = "regulator-fixed"; + regulator-name = "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + }; + + vcc_1v8: vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply = <&vdd_cpu>; +}; + +&combphy { + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <200000000>; + mmc-hs200-1_8v; + supports-emmc; + non-removable; + num-slots = <1>; + status = "disabled"; +}; + +&npu { + npu-supply = <&vdd_npu>; + status = "okay"; +}; + +&power { + pd_npu-supply = <&vdd_npu>; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; + +&sfc { + status = "okay"; +}; + +&u2phy { + status = "okay"; +}; + +&u2phy_host { + status = "okay"; +}; + +&u2phy_otg { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usbdrd3 { + status = "okay"; + extcon = <&u2phy>; +}; + +&usbdrd_dwc3 { + status = "okay"; +}; + +&pinctrl { + + pmic { + en_gpio: en-gpio { + rockchip,pins = + <0 RK_PC4 0 &pcfg_pull_up>; + }; + + vsel_gpio: vsel-gpio { + rockchip,pins = + <0 RK_PA5 0 &pcfg_pull_down>; + }; + i2c0_gpio: i2c0-gpio { + rockchip,pins = + /* i2c0_sda */ + <0 RK_PB1 0 &pcfg_pull_up>, + /* i2c0_scl */ + <0 RK_PB0 0 &pcfg_pull_up>; + }; + }; +};