From 09d21836e5beb7bf3d078d1bf181df69713a9def Mon Sep 17 00:00:00 2001
From: Sandy Huang <hjc@rock-chips.com>
Date: Tue, 3 Apr 2018 21:04:22 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3308: init for uboot logo

Change-Id: I36085d2fc033a76e3ee6d0db563ee327deca264d
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3308.dtsi | 25 +++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 7d2303e72110..6c2cb090658a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -118,7 +118,19 @@
 	display_subsystem: display-subsystem {
 		compatible = "rockchip,display-subsystem";
 		ports = <&vop_out>;
+		logo-memory-region = <&drm_logo>;
 		status = "disabled";
+
+		route {
+			route_rgb: route-rgb {
+				status = "disabled";
+				logo,uboot = "logo.bmp";
+				/* logo,kernel = "logo_kernel.bmp"; */
+				logo,mode = "center";
+				charge_logo,mode = "center";
+				connect = <&vop_out_rgb>;
+			};
+		};
 	};
 
 	fiq_debugger: fiq-debugger {
@@ -153,7 +165,7 @@
 	rgb: rgb {
 		compatible = "rockchip,rk3308-rgb";
 		status = "disabled";
-		pinctrl-names = "lcdc";
+		pinctrl-names = "default";
 		pinctrl-0 = <&lcdc_ctl>;
 
 		ports {
@@ -175,6 +187,17 @@
 		};
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		drm_logo: drm-logo@00000000 {
+			compatible = "rockchip,drm-logo";
+			reg = <0x0 0x0 0x0 0x0>;
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,