From 0a274564e91f609cad9c718b98ec2dd78b67bc39 Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 23 Jun 2022 17:26:00 +0800 Subject: [PATCH] phy: rockchip: csi dphy support TTL mode Signed-off-by: Zefa Chen Change-Id: Ie2806026da6a126a4fd72b26cf26cdf85399fe90 --- .../rockchip/phy-rockchip-csi2-dphy-common.h | 2 ++ .../phy/rockchip/phy-rockchip-csi2-dphy-hw.c | 31 +++++++++++++++++++ drivers/phy/rockchip/phy-rockchip-csi2-dphy.c | 2 +- 3 files changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/phy/rockchip/phy-rockchip-csi2-dphy-common.h b/drivers/phy/rockchip/phy-rockchip-csi2-dphy-common.h index 631fd67271ba..97d31da945bd 100644 --- a/drivers/phy/rockchip/phy-rockchip-csi2-dphy-common.h +++ b/drivers/phy/rockchip/phy-rockchip-csi2-dphy-common.h @@ -116,6 +116,8 @@ struct csi2_dphy_hw { int (*stream_on)(struct csi2_dphy *dphy, struct v4l2_subdev *sd); int (*stream_off)(struct csi2_dphy *dphy, struct v4l2_subdev *sd); + int (*ttl_mode_enable)(struct csi2_dphy_hw *hw); + void (*ttl_mode_disable)(struct csi2_dphy_hw *hw); }; #endif diff --git a/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c b/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c index c56c83763fd1..e11f27cfb3b0 100644 --- a/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c +++ b/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c @@ -784,6 +784,29 @@ static int csi2_dphy_hw_stream_off(struct csi2_dphy *dphy, return 0; } +static int csi2_dphy_hw_ttl_mode_enable(struct csi2_dphy_hw *hw) +{ + int ret = 0; + + ret = clk_bulk_prepare_enable(hw->num_clks, hw->clks_bulk); + if (ret) { + dev_err(hw->dev, "failed to enable clks\n"); + return ret; + } + + write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, 0x7d); + write_csi2_dphy_reg(hw, CSI2PHY_DUAL_CLK_EN, 0x5f); + write_csi2_dphy_reg(hw, CSI2PHY_PATH0_MODEL, 0x1); + write_csi2_dphy_reg(hw, CSI2PHY_PATH1_MODEL, 0x1); + return ret; +} + +static void csi2_dphy_hw_ttl_mode_disable(struct csi2_dphy_hw *hw) +{ + write_csi2_dphy_reg(hw, CSI2PHY_REG_CTRL_LANE_ENABLE, 0x01); + clk_bulk_disable_unprepare(hw->num_clks, hw->clks_bulk); +} + static void rk3568_csi2_dphy_hw_individual_init(struct csi2_dphy_hw *hw) { hw->grf_regs = rk3568_grf_dphy_regs; @@ -917,6 +940,14 @@ static int rockchip_csi2_dphy_hw_probe(struct platform_device *pdev) dphy_hw->stream_on = drv_data->stream_on; dphy_hw->stream_off = drv_data->stream_off; + if (drv_data->chip_id == CHIP_ID_RV1106) { + dphy_hw->ttl_mode_enable = csi2_dphy_hw_ttl_mode_enable; + dphy_hw->ttl_mode_disable = csi2_dphy_hw_ttl_mode_disable; + } else { + dphy_hw->ttl_mode_enable = NULL; + dphy_hw->ttl_mode_disable = NULL; + } + atomic_set(&dphy_hw->stream_cnt, 0); mutex_init(&dphy_hw->mutex); diff --git a/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c b/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c index f148fb586712..7dac6ef5eed8 100644 --- a/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c +++ b/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c @@ -178,7 +178,7 @@ static int csi2_dphy_update_sensor_mbus(struct v4l2_subdev *sd) RKMODULE_GET_CSI_DPHY_PARAM, &dphy->dphy_param); if (ret) { - dev_err(dphy->dev, "%s fail to get dphy param, used default value\n", + dev_dbg(dphy->dev, "%s fail to get dphy param, used default value\n", __func__); ret = 0; }