From 0a64261970346bb67b2cb1eb0e1dfa0d8d378cff Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Tue, 7 Mar 2017 17:27:11 +0800 Subject: [PATCH] clk: rockchip: use rk3368-efuse clock ids Reference the newly added efuse clock-ids in the clock-tree. Change-Id: Ibbef52bcc44d006ab48e6f1f874e3bc88c681bd6 Signed-off-by: Finley Xiao --- drivers/clk/rockchip/clk-rk3368.c | 2 +- include/dt-bindings/clock/rk3368-cru.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c index 8cacfb94c8ca..e6482d8cba06 100644 --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -713,7 +713,7 @@ static struct rockchip_clk_branch rk3368_clk_branches[] __initdata = { GATE(PCLK_PWM1, "pclk_pwm1", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 6, GFLAGS), GATE(PCLK_UART2, "pclk_uart2", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 5, GFLAGS), GATE(PCLK_EFUSE256, "pclk_efuse_256", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 1, GFLAGS), - GATE(0, "pclk_efuse_1024", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 0, GFLAGS), + GATE(PCLK_EFUSE1024, "pclk_efuse_1024", "pclk_bus", 0, RK3368_CLKGATE_CON(13), 0, GFLAGS), /* * video clk gates diff --git a/include/dt-bindings/clock/rk3368-cru.h b/include/dt-bindings/clock/rk3368-cru.h index 936cdba7c9df..742d12ecc505 100644 --- a/include/dt-bindings/clock/rk3368-cru.h +++ b/include/dt-bindings/clock/rk3368-cru.h @@ -163,6 +163,7 @@ #define PCLK_DPHYRX 369 #define PCLK_DPHYTX0 370 #define PCLK_EFUSE256 371 +#define PCLK_EFUSE1024 372 /* hclk gates */ #define HCLK_USB_PERI 447