From 0ac3329e475b20d7cf4230e01ee0c07fc7598dc3 Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Sun, 18 Oct 2020 11:39:01 +0800 Subject: [PATCH] clk: rockchip: rk3568: Fix HCLK_ACDCDIG Signed-off-by: Sugar Zhang Change-Id: Ifaf30bbdf88f24b330c0caa6861313070c5d2784 --- drivers/clk/rockchip/clk-rk3568.c | 2 +- include/dt-bindings/clock/rk3568-cru.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c index dbfdc13f6fc9..78641d185d05 100644 --- a/drivers/clk/rockchip/clk-rk3568.c +++ b/drivers/clk/rockchip/clk-rk3568.c @@ -746,7 +746,7 @@ static struct rockchip_clk_branch rk3568_clk_branches[] __initdata = { RK3568_CLKGATE_CON(8), 2, GFLAGS, &rk3568_audpwm_fracmux, RK3568_FRAC_MAX_PRATE), - GATE(HCLK_ACDCDIG_I2C, "hclk_acdcdig_i2c", "hclk_gic_audio", 0, + GATE(HCLK_ACDCDIG, "hclk_acdcdig", "hclk_gic_audio", 0, RK3568_CLKGATE_CON(8), 3, GFLAGS), COMPOSITE_NODIV(CLK_ACDCDIG_I2C, "clk_acdcdig_i2c", clk_i2c_p, 0, RK3568_CLKSEL_CON(23), 10, 2, MFLAGS, diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h index 7f9290809cbc..d06f8b085d47 100644 --- a/include/dt-bindings/clock/rk3568-cru.h +++ b/include/dt-bindings/clock/rk3568-cru.h @@ -157,7 +157,7 @@ #define SCLK_AUDPWM_SRC 97 #define SCLK_AUDPWM_FRAC 98 #define SCLK_AUDPWM 99 -#define HCLK_ACDCDIG_I2C 100 +#define HCLK_ACDCDIG 100 #define CLK_ACDCDIG_I2C 101 #define CLK_ACDCDIG_DAC 102 #define CLK_ACDCDIG_ADC 103