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vdin: add sm1 support [1/1]

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PD#SWPL-6065

Problem:
need add vdin support for sm1

Solution:
add vdin support for sm1

Verify:
pxp

Change-Id: I55af5273607a88f4e5a2394de0acbb44811da8f9
Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
Evoke Zhang
2019-03-18 19:48:02 +08:00
committed by Jianxiong Pan
parent f3c9ff5205
commit 0b049e146e
3 changed files with 23 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
drivers/amlogic/media/vin/tvin/vdin/vdin_ctl.c
View File

@@ -589,7 +589,8 @@ static void vdin_set_meas_mux(unsigned int offset, enum tvin_port_e port_,
meas_mux = MEAS_MUX_656_B;
else if ((is_meson_gxl_cpu() || is_meson_gxm_cpu() ||
is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) && (bt_path == BT_PATH_GPIO))
is_meson_tl1_cpu() || is_meson_sm1_cpu()) &&
(bt_path == BT_PATH_GPIO))
meas_mux = MEAS_MUX_656;
else
pr_info("cpu not define or do not support bt656");
@@ -700,7 +701,8 @@ void vdin_set_top(unsigned int offset,
VDI9_ASFIFO_CTRL_BIT, VDI9_ASFIFO_CTRL_WID);
} else if ((is_meson_gxm_cpu() || is_meson_gxl_cpu() ||
is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) && (bt_path == BT_PATH_GPIO)) {
is_meson_tl1_cpu() || is_meson_sm1_cpu()) &&
(bt_path == BT_PATH_GPIO)) {
vdin_mux = VDIN_MUX_656;
wr_bits(offset, VDIN_ASFIFO_CTRL0, 0xe4,
VDI1_ASFIFO_CTRL_BIT, VDI1_ASFIFO_CTRL_WID);
@@ -750,7 +752,7 @@ void vdin_set_top(unsigned int offset,
VDI6_ASFIFO_CTRL_BIT, VDI6_ASFIFO_CTRL_WID);
else {
if (/*is_meson_gxlx2_cpu() || */is_meson_g12b_cpu()
|| is_meson_tl1_cpu())
|| is_meson_tl1_cpu() || is_meson_sm1_cpu())
wr_bits(offset, VDIN_ASFIFO_CTRL3, 0xd4,
VDI6_ASFIFO_CTRL_BIT,
VDI6_ASFIFO_CTRL_WID);
@@ -767,7 +769,7 @@ void vdin_set_top(unsigned int offset,
VDI8_ASFIFO_CTRL_BIT, VDI8_ASFIFO_CTRL_WID);
else {
if (/*is_meson_gxlx2_cpu() || */is_meson_g12b_cpu()
|| is_meson_tl1_cpu())
|| is_meson_tl1_cpu() || is_meson_sm1_cpu())
wr_bits(offset, VDIN_ASFIFO_CTRL3, 0xd4,
VDI6_ASFIFO_CTRL_BIT,
VDI6_ASFIFO_CTRL_WID);
@@ -1510,7 +1512,8 @@ void vdin_set_matrix(struct vdin_dev_s *devp)
*/
wr_bits(offset, VDIN_MATRIX_CTRL, 0,
VDIN_MATRIX1_EN_BIT, VDIN_MATRIX1_EN_WID);
if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_sm1_cpu())
vdin_set_color_matrix0_g12a(devp->addr_offset,
devp->fmt_info_p,
devp->format_convert,
@@ -1543,7 +1546,8 @@ void vdin_set_matrix(struct vdin_dev_s *devp)
devp->prop.color_fmt_range,
devp->prop.vdin_hdr_Flag,
devp->color_range_mode);
if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_sm1_cpu())
vdin_set_color_matrix0_g12a(devp->addr_offset,
devp->fmt_info_p,
devp->format_convert,
@@ -1578,7 +1582,8 @@ void vdin_set_matrixs(struct vdin_dev_s *devp, unsigned char id,
{
switch (id) {
case 0:
if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_sm1_cpu())
vdin_set_color_matrix0_g12a(devp->addr_offset,
devp->fmt_info_p,
devp->format_convert,
@@ -1628,7 +1633,7 @@ void vdin_set_prob_xy(unsigned int offset,
devp->prop.color_fmt_range,
devp->prop.vdin_hdr_Flag,
devp->color_range_mode);
if (is_meson_g12a_cpu() || is_meson_g12b_cpu())
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() || is_meson_sm1_cpu())
vdin_set_color_matrix0_g12a(devp->addr_offset,
devp->fmt_info_p,
devp->format_convert,
@@ -2055,7 +2060,8 @@ void vdin_set_canvas_id(struct vdin_dev_s *devp, unsigned int rdma_enable,
{
#ifdef CONFIG_AMLOGIC_MEDIA_RDMA
if (rdma_enable) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_sm1_cpu()) {
rdma_write_reg_bits(devp->rdma_handle,
VDIN_COM_CTRL0+devp->addr_offset, 1,
VDIN_FORCEGOLINE_EN_BIT, 1);

7
drivers/amlogic/media/vin/tvin/vdin/vdin_drv.c
View File

@@ -2831,7 +2831,7 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
return -EFAULT;
}
memset(&param, 0, sizeof(struct vdin_parm_s));
if (is_meson_tl1_cpu())
if (is_meson_tl1_cpu() || is_meson_sm1_cpu())
param.port = TVIN_PORT_VIU1_WB0_VPP;
else
param.port = TVIN_PORT_VIU1;
@@ -3154,12 +3154,13 @@ static int vdin_drv_probe(struct platform_device *pdev)
if (is_meson_gxbb_cpu() && vdevp->index)
vdin_addr_offset[vdevp->index] = 0x70;
else if ((is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_tl1_cpu()) && vdevp->index)
is_meson_tl1_cpu() || is_meson_sm1_cpu()) && vdevp->index)
vdin_addr_offset[vdevp->index] = 0x100;
vdevp->addr_offset = vdin_addr_offset[vdevp->index];
vdevp->flags = 0;
/*canvas align number*/
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() || is_meson_tl1_cpu())
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_tl1_cpu() || is_meson_sm1_cpu())
vdevp->canvas_align = 64;
else
vdevp->canvas_align = 32;

7
drivers/amlogic/media/vin/tvin/viu/viuin.c
View File

@@ -182,7 +182,7 @@ static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
switch (rd_bits_viu(VPU_VIU_VENC_MUX_CTRL, 0, 2)) {
case 0:
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu())
|| is_meson_tl1_cpu() || is_meson_sm1_cpu())
viu_mux = 0x4;
else
viu_mux = 0x8;
@@ -216,7 +216,8 @@ static int viuin_open(struct tvin_frontend_s *fe, enum tvin_port_e port)
wr_viu(VPU_VIU2VDIN_HDN_CTRL, 0x40f00);
} else
wr_bits_viu(VPU_VIU2VDIN_HDN_CTRL, devp->parm.h_active, 0, 14);
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() || is_meson_tl1_cpu()) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu() ||
is_meson_tl1_cpu() || is_meson_sm1_cpu()) {
if (((port >= TVIN_PORT_VIU1_WB0_VD1) &&
(port <= TVIN_PORT_VIU1_WB0_POST_BLEND)) ||
((port >= TVIN_PORT_VIU2_WB0_VD1) &&
@@ -320,7 +321,7 @@ static void viuin_close(struct tvin_frontend_s *fe)
open_cnt--;
if (open_cnt == 0) {
if (is_meson_g12a_cpu() || is_meson_g12b_cpu()
|| is_meson_tl1_cpu()) {
|| is_meson_tl1_cpu() || is_meson_sm1_cpu()) {
wr_viu(VPU_VIU_VDIN_IF_MUX_CTRL, 0);
wr_viu(VPP_WRBAK_CTRL, 0);