From 0b5d5eafb14340af14e29cd668fc96dd3ff5b111 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Thu, 22 Nov 2018 19:17:21 +0800 Subject: [PATCH] drm/rockchip: rk618: refactor display pipeline It's hard to do platform specific initialization in the current pipeline. This patch convert to generic bridge interface and let it attach to a platform specific encoder. CRTC --> Encoder --> Bridge --> Connector --> Panel (platform) This patch changed the pipeline to: CRTC --> Encoder --> Bridge --> Connector --> Panel (platform) (platform) Change-Id: I43e0dab05e41965767f55cfe15b3674a71911312 Signed-off-by: Wyon Bi --- .../display/rockchip/rockchip,rk618.txt | 130 ++++---- drivers/gpu/drm/rockchip/rk618/Makefile | 5 +- drivers/gpu/drm/rockchip/rk618/rk618_dither.c | 25 +- drivers/gpu/drm/rockchip/rk618/rk618_dither.h | 17 + drivers/gpu/drm/rockchip/rk618/rk618_lvds.c | 235 ++++++++++---- drivers/gpu/drm/rockchip/rk618/rk618_rgb.c | 261 ++++++++++++---- drivers/gpu/drm/rockchip/rk618/rk618_scaler.c | 294 +++++++++++++++--- drivers/gpu/drm/rockchip/rk618/rk618_vif.c | 71 +++-- 8 files changed, 763 insertions(+), 275 deletions(-) create mode 100644 drivers/gpu/drm/rockchip/rk618/rk618_dither.h diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt index e94ca4b90ff2..dbc5e60c9758 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk618.txt @@ -21,7 +21,9 @@ bindings specified in Documentation/devicetree/bindings/graph.txt. Example: &rk618 { - VIF: vif { + status = "okay"; + + vif { compatible = "rockchip,rk618-vif"; clocks = <&CRU VIF0_CLK>, <&CRU VIF0_PRE_CLK>; clock-names = "vif", "vif_pre"; @@ -34,23 +36,74 @@ Example: port@0 { reg = <0>; - vif_input_hdmi: endpoint { - remote-endpoint = <&hdmi_output_vif>; + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; }; }; port@1 { reg = <1>; - vif_output_lvds: endpoint { - remote-endpoint = <&lvds_input_vif>; + vif_output_hdmi: endpoint { + remote-endpoint = <&hdmi_input_vif>; }; }; }; }; }; -LVDS Encoder +SCALER Module +---------- + +Required properties: +- compatible: value should be one of the following: + "rockchip,rk618-scaler" +- clocks: must include clock specifiers corresponding to entries in the + clock-names property. + See ../clocks/clock-bindings.txt for details. +- clock-names: list of clock names sorted in the same order as the clocks + property. Must contain "scaler", "vif", "dither". + +Required nodes: + +The connections to the video ports are modeled using the OF graph +bindings specified in Documentation/devicetree/bindings/graph.txt. + +Example: + +&rk618 { + status = "okay"; + + scaler { + compatible = "rockchip,rk618-scaler"; + clocks = <&CRU SCALER_CLK>, <&CRU DITHER_CLK>, <&CRU VIF0_CLK>; + clock-names = "scaler", "dither", "vif"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + scaler_input_hdmi: endpoint { + remote-endpoint = <&hdmi_output_scaler>; + }; + }; + + port@1 { + reg = <1>; + + scaler_output_lvds: endpoint { + remote-endpoint = <&lvds_input_scaler>; + }; + }; + }; + }; +}; + +LVDS Connector ------------ Required properties: @@ -60,7 +113,10 @@ Required properties: clock-names property. See ../clocks/clock-bindings.txt for details. - clock-names: list of clock names sorted in the same order as the clocks - property. Must contain "lvds", "dither", "vif", "scaler". + property. Must contain "lvds". + +Optional properties: +- dual-channel: boolean. if it exists, enable dual channel mode Required nodes: @@ -74,9 +130,8 @@ Example: lvds { compatible = "rockchip,rk618-lvds"; - clocks = <&CRU LVDS_CLK>, <&CRU DITHER_CLK>, - <&CRU VIF0_CLK>, <&CRU SCALER_CLK>; - clock-names = "lvds", "dither", "vif", "scaler"; + clocks = <&CRU LVDS_CLK>; + clock-names = "lvds"; status = "okay"; ports { @@ -85,22 +140,9 @@ Example: port@0 { reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - lvds_input_vop: endpoint@0 { - reg = <0>; - remote-endpoint = <&vop_output_lvds>; - }; - - lvds_input_vif: endpoint@1 { - reg = <1>; - remote-endpoint = <&vif_output_lvds>; - }; - - lvds_input_hdmi: endpoint@2 { - reg = <2>; - remote-endpoint = <&hdmi_output_lvds>; + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; }; }; @@ -115,7 +157,7 @@ Example: }; }; -RGB Encoder +RGB Connector ------------ Required properties: @@ -125,7 +167,7 @@ Required properties: clock-names property. See ../clocks/clock-bindings.txt for details. - clock-names: list of clock names sorted in the same order as the clocks - property. Must contain "rgb", "dither", "vif", "scaler". + property. Must contain "rgb". Required nodes: @@ -139,9 +181,8 @@ Example: rgb { compatible = "rockchip,rk618-rgb"; - clocks = <&CRU RGB_CLK>, <&CRU DITHER_CLK>, - <&CRU VIF0_CLK>, <&CRU SCALER_CLK>; - clock-names = "rgb", "dither", "vif", "scaler"; + clocks = <&CRU RGB_CLK>; + clock-names = "rgb"; status = "okay"; ports { @@ -150,22 +191,9 @@ Example: port@0 { reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - rgb_input_vop: endpoint@0 { - reg = <0>; - remote-endpoint = <&vop_output_rgb>; - }; - - rgb_input_vif: endpoint@1 { - reg = <1>; - remote-endpoint = <&vif_output_rgb>; - }; - - rgb_input_hdmi: endpoint@2 { - reg = <2>; - remote-endpoint = <&hdmi_output_rgb>; + bridge_input_rgb: endpoint { + remote-endpoint = <&rgb_out_bridge>; }; }; @@ -173,16 +201,12 @@ Example: reg = <1>; #address-cells = <1>; #size-cells = <0>; - rgb_lcdc1_out_tve: endpoint@0 { + + rgb_output_panel: endpoint@0 { reg = <0>; - remote-endpoint = <&tve_in_rgb_lcdc1>; - }; - rgb_out_tve: endpoint@1 { - status = "disabled"; - reg = <1>; - remote-endpoint = <&tve_in_rgb>; + remote-endpoint = <&panel_input_rgb>; }; }; }; }; -}; \ No newline at end of file +}; diff --git a/drivers/gpu/drm/rockchip/rk618/Makefile b/drivers/gpu/drm/rockchip/rk618/Makefile index ad508944f29a..a1630c46402d 100644 --- a/drivers/gpu/drm/rockchip/rk618/Makefile +++ b/drivers/gpu/drm/rockchip/rk618/Makefile @@ -3,9 +3,8 @@ # Makefile for the Rockchip RK618 display bridge driver. # -obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618_output.o \ - rk618_scaler.o \ +obj-$(CONFIG_DRM_ROCKCHIP_RK618) += rk618_scaler.o \ rk618_vif.o \ rk618_dither.o \ rk618_lvds.o \ - rk618_rgb.o \ + rk618_rgb.o diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_dither.c b/drivers/gpu/drm/rockchip/rk618/rk618_dither.c index a7d944aa0454..10e141a59bd6 100644 --- a/drivers/gpu/drm/rockchip/rk618/rk618_dither.c +++ b/drivers/gpu/drm/rockchip/rk618/rk618_dither.c @@ -1,18 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017 Rockchip Electronics Co. Ltd. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * Author: Wyon Bi */ -#include "rk618_output.h" +#include "rk618_dither.h" #define RK618_FRC_REG 0x0054 #define FRC_DEN_INV HIWORD_UPDATE(1, 6, 6) @@ -26,20 +19,20 @@ #define FRC_DITHER_ENABLE HIWORD_UPDATE(1, 0, 0) #define FRC_DITHER_DISABLE HIWORD_UPDATE(0, 0, 0) -void rk618_dither_disable(struct rk618 *rk618) +void rk618_frc_dither_disable(struct rk618 *rk618) { regmap_write(rk618->regmap, RK618_FRC_REG, FRC_DITHER_DISABLE); } -EXPORT_SYMBOL_GPL(rk618_dither_disable); +EXPORT_SYMBOL_GPL(rk618_frc_dither_disable); -void rk618_dither_enable(struct rk618 *rk618) +void rk618_frc_dither_enable(struct rk618 *rk618) { regmap_write(rk618->regmap, RK618_FRC_REG, FRC_DITHER_ENABLE); } -EXPORT_SYMBOL_GPL(rk618_dither_enable); +EXPORT_SYMBOL_GPL(rk618_frc_dither_enable); -void rk618_dither_frc_dclk_invert(struct rk618 *rk618) +void rk618_frc_dclk_invert(struct rk618 *rk618) { regmap_write(rk618->regmap, RK618_FRC_REG, FRC_DCLK_INV); } -EXPORT_SYMBOL_GPL(rk618_dither_frc_dclk_invert); +EXPORT_SYMBOL_GPL(rk618_frc_dclk_invert); diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_dither.h b/drivers/gpu/drm/rockchip/rk618/rk618_dither.h new file mode 100644 index 000000000000..af12fbdb9ab6 --- /dev/null +++ b/drivers/gpu/drm/rockchip/rk618/rk618_dither.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2018 Rockchip Electronics Co. Ltd. + * + * Author: Wyon Bi + */ + +#ifndef _RK618_DITHER_H_ +#define _RK618_DITHER_H_ + +#include + +void rk618_frc_dither_disable(struct rk618 *rk618); +void rk618_frc_dither_enable(struct rk618 *rk618); +void rk618_frc_dclk_invert(struct rk618 *rk618); + +#endif diff --git a/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c b/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c index df45e7ec50ec..0dccf6e77c8b 100644 --- a/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c +++ b/drivers/gpu/drm/rockchip/rk618/rk618_lvds.c @@ -1,20 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2017 Rockchip Electronics Co. Ltd. * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. + * Author: Wyon Bi */ -#include "rk618_output.h" +#include +#include +#include +#include +#include +#include -#define IS_DOUBLE_CHANNEL(lvds) ((lvds)->channels == 2) +#include +#include +#include +#include +#include +#include + +#include