From 0d0de0337a6b552cda8511ad9db6aa507ad233a3 Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Fri, 22 Aug 2025 11:18:55 +0800 Subject: [PATCH] drm/rockchip: vop2: get plane max input/output from win data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The win_data structure provides a more accurate way to obtain each plane’s maximum input and output size. Signed-off-by: Sandy Huang Change-Id: I11cc40b9886235079d2e03d3a4ef64649bd32659 --- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2 + drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 51 ++++++++----- drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 76 ++++++++++++++++++++ 3 files changed, 111 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 34d017f1c0f9..422d3f75495e 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -1250,6 +1250,8 @@ struct vop2_win_data { const struct vop2_win_regs *regs; const struct vop2_win_regs **area; unsigned int area_size; + struct vop_rect max_input; + struct vop_rect max_output; /* * vertical/horizontal scale up/down filter mode diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 919f5def3f2b..f4f804d98d1f 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -14864,18 +14864,36 @@ static bool vop3_ignore_plane(struct vop2 *vop2, struct vop2_win *win) return false; } -static u32 vop3_esmart_linebuffer_size(struct vop2 *vop2, struct vop2_win *win) +static int vop2_get_max_output_width(struct vop2 *vop2, struct vop2_win *win) { - if (!is_vop3(vop2) || vop2_cluster_window(win)) - return vop2->data->max_output.width; + int width = vop2->data->win[win->win_id].max_output.width; - if (vop2->esmart_lb_mode == VOP3_ESMART_2K_2K_2K_2K_MODE || - (vop2->esmart_lb_mode == VOP3_ESMART_4K_2K_2K_MODE && win->phys_id != ROCKCHIP_VOP2_ESMART0) || - (vop2->esmart_lb_mode == VOP3_ESMART_4K_4K_2K_2K_MODE && - (win->phys_id == ROCKCHIP_VOP2_ESMART2 || win->phys_id == ROCKCHIP_VOP2_ESMART3))) - return vop2->data->max_output.width / 2; - else - return vop2->data->max_output.width; + if (vop2_cluster_window(win)) + return width; + + switch (vop2->version) { + case VOP_VERSION_RK3528: + case VOP_VERSION_RK3562: + if (vop2->esmart_lb_mode == VOP3_ESMART_2K_2K_2K_2K_MODE) + return width / 2; + else if (vop2->esmart_lb_mode == VOP3_ESMART_4K_2K_2K_MODE && + (win->phys_id == ROCKCHIP_VOP2_ESMART2 || + win->phys_id == ROCKCHIP_VOP2_ESMART3)) + return width / 2; + else + return width; + case VOP_VERSION_RK3576: + if (vop2->esmart_lb_mode == VOP3_ESMART_4K_4K_2K_2K_MODE && + (win->phys_id == ROCKCHIP_VOP2_ESMART2 || + win->phys_id == ROCKCHIP_VOP2_ESMART3)) + return width / 2; + else + return width; + case VOP_VERSION_RK3568: + case VOP_VERSION_RK3588: + default: + return width; + } } static int rk3576_shared_mode_esmart_scale_engine(int phy_id) @@ -14985,18 +15003,15 @@ static int vop2_plane_init(struct vop2 *vop2, struct vop2_win *win, unsigned lon if (win->feature & WIN_FEATURE_DCI) vop2_plane_create_dci_property(vop2, win); - max_width = vop2->data->max_input.width; - max_height = vop2->data->max_input.height; - if (win->feature & WIN_FEATURE_CLUSTER_SUB) - max_width >>= 1; + max_width = vop2->data->win[win->win_id].max_input.width; + max_height = vop2->data->win[win->win_id].max_input.height; win->input_width_prop = drm_property_create_range(vop2->drm_dev, DRM_MODE_PROP_IMMUTABLE, "INPUT_WIDTH", 0, max_width); win->input_height_prop = drm_property_create_range(vop2->drm_dev, DRM_MODE_PROP_IMMUTABLE, "INPUT_HEIGHT", 0, max_height); - max_width = vop3_esmart_linebuffer_size(vop2, win); - max_height = vop2->data->max_output.height; - if (win->feature & WIN_FEATURE_CLUSTER_SUB) - max_width >>= 1; + + max_width = vop2_get_max_output_width(vop2, win); + max_height = vop2->data->win[win->win_id].max_output.height; win->output_width_prop = drm_property_create_range(vop2->drm_dev, DRM_MODE_PROP_IMMUTABLE, "OUTPUT_WIDTH", 0, max_width); win->output_height_prop = drm_property_create_range(vop2->drm_dev, DRM_MODE_PROP_IMMUTABLE, diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c index a4565b2aba3b..8cd76fb55892 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -3152,6 +3152,8 @@ static const struct vop2_win_data rk3528_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x06, @@ -3182,6 +3184,8 @@ static const struct vop2_win_data rk3528_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 0, .axi_yrgb_id = 0x08, @@ -3212,6 +3216,8 @@ static const struct vop2_win_data rk3528_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_CURSOR, .axi_id = 0, .axi_yrgb_id = 0x0a, @@ -3242,6 +3248,8 @@ static const struct vop2_win_data rk3528_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x0c, @@ -3271,6 +3279,8 @@ static const struct vop2_win_data rk3528_vop_win_data[] = { .hsd_pre_filter_mode = VOP3_PRE_SCALE_DOWN_AVG,/* gt or avg */ .vsd_pre_filter_mode = VOP3_PRE_SCALE_DOWN_AVG,/* gt or avg */ .regs = &rk3528_cluster0_win_data, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .axi_yrgb_id = 0x02, .axi_uv_id = 0x03, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0), @@ -3298,6 +3308,8 @@ static const struct vop2_win_data rk3528_vop_win_data[] = { .hsd_pre_filter_mode = VOP3_PRE_SCALE_DOWN_AVG,/* gt or avg */ .vsd_pre_filter_mode = VOP3_PRE_SCALE_DOWN_AVG,/* gt or avg */ .regs = &rk3528_cluster0_win_data, + .max_input = { 2048, 4096 }, + .max_output = { 2048, 4096 }, .axi_yrgb_id = 0x04, .axi_uv_id = 0x05, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0), @@ -3340,6 +3352,8 @@ static const struct vop2_win_data rk3562_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x02, @@ -3368,6 +3382,8 @@ static const struct vop2_win_data rk3562_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 0, .axi_yrgb_id = 0x04, @@ -3396,6 +3412,8 @@ static const struct vop2_win_data rk3562_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x06, @@ -3424,6 +3442,8 @@ static const struct vop2_win_data rk3562_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 0, .axi_yrgb_id = 0x08, @@ -3471,6 +3491,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2), @@ -3496,6 +3518,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2), @@ -3521,6 +3545,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2), @@ -3546,6 +3572,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2), @@ -3575,6 +3603,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .max_upscale_factor = 4, .max_downscale_factor = 4, .dly = { 0, 27, 21 }, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_MAIN, }, @@ -3597,6 +3627,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { BIT(ROCKCHIP_VOP_VP2), .max_upscale_factor = 4, .max_downscale_factor = 4, + .max_input = { 2048, 4096 }, + .max_output = { 2048, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_SUB, }, @@ -3616,6 +3648,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3568_cluster1_win_data, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2), @@ -3639,6 +3673,8 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3568_cluster1_win_data, + .max_input = { 2048, 4096 }, + .max_output = { 2048, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2), @@ -3820,6 +3856,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), .pd_id = VOP2_PD_ESMART, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x10, @@ -3850,6 +3888,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), .pd_id = VOP2_PD_ESMART, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x12, @@ -3880,6 +3920,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), .pd_id = VOP2_PD_ESMART, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 1, .axi_yrgb_id = 0x0a, @@ -3910,6 +3952,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), .pd_id = VOP2_PD_ESMART, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 1, .axi_yrgb_id = 0x0c, @@ -3945,6 +3989,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .reg_done_bit = 0, .max_upscale_factor = 8, .max_downscale_factor = 8, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_MAIN | WIN_FEATURE_Y2R_13BIT_DEPTH | WIN_FEATURE_DCI, @@ -3972,6 +4018,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .reg_done_bit = 0, .max_upscale_factor = 8, .max_downscale_factor = 8, + .max_input = { 2048, 4096 }, + .max_output = { 2048, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_SUB, }, @@ -3999,6 +4047,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .reg_done_bit = 1, .max_upscale_factor = 8, .max_downscale_factor = 8, + .max_input = { 4096, 4096 }, + .max_output = { 4096, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_MAIN | WIN_FEATURE_Y2R_13BIT_DEPTH, }, @@ -4025,6 +4075,8 @@ static const struct vop2_win_data rk3576_vop_win_data[] = { .reg_done_bit = 1, .max_upscale_factor = 8, .max_downscale_factor = 8, + .max_input = { 2048, 4096 }, + .max_output = { 2048, 4096 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_SUB, }, @@ -4324,6 +4376,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .max_upscale_factor = 4, .max_downscale_factor = 4, .dly = { 4, 26, 29, 4, 35, 3, 5 }, + .max_input = { 7680, 7680 }, + .max_output = { 7680, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_MAIN | WIN_FEATURE_SPLICE_LEFT, }, @@ -4350,6 +4404,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .reg_done_bit = 0, .max_upscale_factor = 4, .max_downscale_factor = 4, + .max_input = { 2048, 7680 }, + .max_output = { 2048, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER_SUB, }, @@ -4373,6 +4429,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .axi_id = 0, .axi_yrgb_id = 6, .axi_uv_id = 7, + .max_input = { 4096, 7680 }, + .max_output = { 4096, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .possible_vp_mask = BIT(ROCKCHIP_VOP_VP0) | BIT(ROCKCHIP_VOP_VP1) | BIT(ROCKCHIP_VOP_VP2) | BIT(ROCKCHIP_VOP_VP3), @@ -4397,6 +4455,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3568_cluster1_win_data, + .max_input = { 2048, 7680 }, + .max_output = { 2048, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 0, .axi_yrgb_id = 8, @@ -4426,6 +4486,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3588_cluster2_win_data, + .max_input = { 7680, 7680 }, + .max_output = { 7680, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 1, .axi_yrgb_id = 2, @@ -4453,6 +4515,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3588_cluster2_win_data, + .max_input = { 2048, 7680 }, + .max_output = { 2048, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 1, .axi_yrgb_id = 4, @@ -4481,6 +4545,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3588_cluster3_win_data, + .max_input = { 4096, 7680 }, + .max_output = { 4096, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 1, .axi_yrgb_id = 6, @@ -4508,6 +4574,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .vsu_filter_mode = VOP2_SCALE_UP_BIL, .vsd_filter_mode = VOP2_SCALE_DOWN_BIL, .regs = &rk3588_cluster3_win_data, + .max_input = { 2048, 7680 }, + .max_output = { 2048, 7680 }, .type = DRM_PLANE_TYPE_OVERLAY, .axi_id = 1, .axi_yrgb_id = 8, @@ -4537,6 +4605,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 7680, 7680 }, + .max_output = { 7680, 7680 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x0a, @@ -4568,6 +4638,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 7680, 7680 }, + .max_output = { 7680, 7680 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 1, .axi_yrgb_id = 0x0a, @@ -4598,6 +4670,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 7680 }, + .max_output = { 4096, 7680 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 0, .axi_yrgb_id = 0x0c, @@ -4628,6 +4702,8 @@ static const struct vop2_win_data rk3588_vop_win_data[] = { .regs = &rk3568_esmart_win_data, .area = rk3568_area_data, .area_size = ARRAY_SIZE(rk3568_area_data), + .max_input = { 4096, 7680 }, + .max_output = { 4096, 7680 }, .type = DRM_PLANE_TYPE_PRIMARY, .axi_id = 1, .axi_yrgb_id = 0x0c,