From 0d7b0f59bdf9e17e7acb89764cade474a4f1353d Mon Sep 17 00:00:00 2001
From: Tony Xie <tony.xie@rock-chips.com>
Date: Wed, 15 Dec 2021 09:59:14 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s: add cpu idle node.

Signed-off-by: Tony Xie <tony.xie@rock-chips.com>
Change-Id: I15075903eeb9b17c3dc8d9b55a36df4b6c2c79eb
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 4a1e63c94770..106c7d5efe3f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -316,6 +316,7 @@
 			capacity-dmips-mhz = <530>;
 			clocks = <&cru ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_l1: cpu@100 {
@@ -326,6 +327,7 @@
 			capacity-dmips-mhz = <530>;
 			clocks = <&cru ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_l2: cpu@200 {
@@ -336,6 +338,7 @@
 			capacity-dmips-mhz = <530>;
 			clocks = <&cru ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_l3: cpu@300 {
@@ -346,6 +349,7 @@
 			capacity-dmips-mhz = <530>;
 			clocks = <&cru ARMCLK_L>;
 			operating-points-v2 = <&cluster0_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b0: cpu@400 {
@@ -356,6 +360,7 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk SCMI_CLK_CPUB01>;
 			operating-points-v2 = <&cluster1_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b1: cpu@500 {
@@ -366,6 +371,7 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk SCMI_CLK_CPUB01>;
 			operating-points-v2 = <&cluster1_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b2: cpu@600 {
@@ -376,6 +382,7 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk SCMI_CLK_CPUB23>;
 			operating-points-v2 = <&cluster2_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
 		};
 
 		cpu_b3: cpu@700 {
@@ -386,6 +393,19 @@
 			capacity-dmips-mhz = <1024>;
 			clocks = <&scmi_clk SCMI_CLK_CPUB23>;
 			operating-points-v2 = <&cluster2_opp_table>;
+			cpu-idle-states = <&CPU_SLEEP>;
+		};
+
+		idle-states {
+			entry-method = "psci";
+			CPU_SLEEP: cpu-sleep {
+				compatible = "arm,idle-state";
+				local-timer-stop;
+				arm,psci-suspend-param = <0x0010000>;
+				entry-latency-us = <100>;
+				exit-latency-us = <120>;
+				min-residency-us = <1000>;
+			};
 		};
 	};