diff --git a/drivers/soc/rockchip/pm_domains.c b/drivers/soc/rockchip/pm_domains.c index 435102ba6740..1b6c42528294 100644 --- a/drivers/soc/rockchip/pm_domains.c +++ b/drivers/soc/rockchip/pm_domains.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -282,6 +283,22 @@ static void rockchip_pmu_unlock(struct rockchip_pm_domain *pd) .keepon_startup = keepon, \ } +#define DOMAIN_M_G(_name, pwr, status, req, idle, ack, g_mask, wakeup, keepon) \ +{ \ + .name = _name, \ + .pwr_w_mask = (pwr) << 16, \ + .pwr_mask = (pwr), \ + .status_mask = (status), \ + .req_w_mask = (req) << 16, \ + .req_mask = (req), \ + .idle_mask = (idle), \ + .ack_mask = (ack), \ + .clk_ungate_mask = (g_mask), \ + .clk_ungate_w_mask = (g_mask) << 16, \ + .active_wakeup = wakeup, \ + .keepon_startup = keepon, \ +} + #define DOMAIN_M_G_SD(_name, pwr, status, req, idle, ack, g_mask, mem, wakeup, keepon) \ { \ .name = _name, \ @@ -381,6 +398,12 @@ static void rockchip_pmu_unlock(struct rockchip_pm_domain *pd) #define DOMAIN_RV1126_O(name, pwr, req, idle, r_offset, wakeup) \ DOMAIN_M_O(name, pwr, pwr, 0, req, idle, idle, r_offset, wakeup, false) +#define DOMAIN_RV1126B(name, pwr, req, wakeup) \ + DOMAIN_M_G(name, pwr, pwr, req, req, req, req, wakeup, false) + +#define DOMAIN_RV1126B_P(name, pwr, req, wakeup) \ + DOMAIN_M_G(name, pwr, pwr, req, req, req, req, wakeup, true) + #define DOMAIN_RK3288(name, pwr, status, req, wakeup) \ DOMAIN(name, pwr, status, req, req, (req) << 16, wakeup, false) @@ -1890,6 +1913,13 @@ static const struct rockchip_domain_info rv1126_pm_domains[] = { [RV1126_PD_NPU] = DOMAIN_RV1126_O("npu", BIT(0), BIT(2), BIT(18), 0x4, false), }; +static const struct rockchip_domain_info rv1126b_pm_domains[] = { + /* name pwr req wakeup */ + [RV1126B_PD_NPU] = DOMAIN_RV1126B("npu", BIT(0), BIT(8), false), + [RV1126B_PD_VDO] = DOMAIN_RV1126B("vdo", BIT(1), BIT(9), false), + [RV1126B_PD_AISP] = DOMAIN_RV1126B_P("aisp", BIT(2), BIT(10), false), +}; + static const struct rockchip_domain_info rk1808_pm_domains[] = { [RK1808_VD_NPU] = DOMAIN_PX30("npu", BIT(15), BIT(15), BIT(2), false), [RK1808_PD_PCIE] = DOMAIN_PX30("pcie", BIT(9), BIT(9), BIT(4), true), @@ -2327,6 +2357,18 @@ static const struct rockchip_pmu_info rv1126_pmu = { .domain_info = rv1126_pm_domains, }; +static const struct rockchip_pmu_info rv1126b_pmu = { + .pwr_offset = 0x210, + .status_offset = 0x230, + .req_offset = 0x110, + .idle_offset = 0x128, + .ack_offset = 0x120, + .clk_ungate_offset = 0x140, + + .num_domains = ARRAY_SIZE(rv1126b_pm_domains), + .domain_info = rv1126b_pm_domains, +}; + static const struct of_device_id rockchip_pm_domain_dt_match[] = { #ifdef CONFIG_CPU_PX30 { @@ -2435,6 +2477,12 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = { .compatible = "rockchip,rv1126-power-controller", .data = (void *)&rv1126_pmu, }, +#endif +#ifdef CONFIG_CPU_RV1126B + { + .compatible = "rockchip,rv1126b-power-controller", + .data = (void *)&rv1126b_pmu, + }, #endif { /* sentinel */ }, };