From 0e7bc1d765aa3ad3ea89d382c7fb5fc1ef4a8f87 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Thu, 17 Aug 2023 09:23:00 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3562: Change clkin div to 4 for aclk vo The aclk vop should be equal or greater than the half of dlck vop, the highest frequency of dclk may be 148.5MHz, the aclk vop is 396MHz, so change the clkin div to 4. Signed-off-by: Finley Xiao Change-Id: Ibc47f31b7d03530929fd537020c60a39708ccdcb --- arch/arm64/boot/dts/rockchip/rk3562.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index 2716af7ca471..30faecda68e2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -368,7 +368,7 @@ <1 0x00a000a8 0x7c39>, <2 0x00a000a8 0x7c39>, <3 0x00a000a8 0x7c39>, - <4 0x00a000a5 0xb007>, + <4 0x00a000a4 0xb007>, <5 0x00a000a8 0x7034>, <6 0x00a000a8 0x7034>, <7 0x00a000a8 0x7034>,