From 0f14c0d4e8160ef46bfd52efbc8e274a58c8c34a Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Wed, 18 Nov 2020 11:00:27 +0800 Subject: [PATCH] drm/rockchip: vop2: Count afbc vir stride by pixel Change-Id: Ie153a014f059238cba5752d323beecf04b1d47b9 Signed-off-by: Andy Yan --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index c01b60576dd7..a75d865fb3fb 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -1553,6 +1553,7 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, struct drm_plane_s struct rockchip_crtc_state *vcstate = to_rockchip_crtc_state(crtc->state); struct vop2 *vop2 = win->vop2; struct drm_framebuffer *fb = pstate->fb; + uint32_t bpp = fb->format->bpp[0]; uint32_t actual_w, actual_h, dsp_w, dsp_h; uint32_t dsp_stx, dsp_sty; uint32_t act_info, dsp_info, dsp_st; @@ -1625,6 +1626,10 @@ static void vop2_plane_atomic_update(struct drm_plane *plane, struct drm_plane_s /* the afbc superblock is 16 x 16 */ afbc_format = vop2_convert_afbc_format(fb->format->format); afbc_tile_num = actual_w >> 4; + /* AFBC pic_vir_width is count by pixel, this is different + * with WIN_VIR_STRIDE. + */ + stride = (fb->pitches[0] << 3) / bpp; afbc_half_block_en = vop2_afbc_half_block_enable(vpstate); VOP_AFBC_SET(vop2, win, enable, 1); VOP_AFBC_SET(vop2, win, format, afbc_format);